Commit Graph

32 Commits

Author SHA1 Message Date
Ying-Chun Liu (PaulLiu) 81d1d86c89 refactor(plat/imx/imx): make imx io-storage logic for TBBR/FIP common
This commit makes imx image io-storage logic common for all
imx platform.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Change-Id: I15045ac8f9dfa8cb714e32f9e7475d5eae4e86e4
2021-09-14 21:42:01 +08:00
Yann Gautier 99d37c8cb8 fix(plat/imx): do not keep mmc_device_info in stack
Create a dedicated static struct mmc_device_info mmc_info mmc_info
instead of having this in stack.
A boot issue has been seen on some platform when applying patch [1].

 [1] 13f3c5166f ("mmc:prevent accessing to the released space in case of wrong usage")

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Iba0424a5787f9e510a60696d4033db1b49b243b2
2021-05-27 13:47:37 +02:00
Manish V Badarkhe ad43c49ee3 Cleanup the code for TBBR CoT descriptors
CoT used for BL1 and BL2 are moved to tbbr_cot_bl1.c
and tbbr_cot_bl2.c respectively.
Common CoT used across BL1 and BL2 are moved to
tbbr_cot_common.c.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I2252ac8a6960b3431bcaafdb3ea4fb2d01b79cf5
2020-05-19 05:05:19 +01:00
Andre Przywara d7873bcd54 imx: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.

Change-Id: I058f793e4024fa7291e432f5be374a77faf16f36
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-02-25 09:34:38 +00:00
Deepika Bhavnani 7a57188b94 imx: Unify Platform specific defines for PSCI module
PLATFORM_CORE_COUNT - Unsigned int
PLATFORM_CLUSTER_COUNT - Unsigned int
PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int
PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int

Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: I8b19e833a4e1067e1cfcc9bfaede7854e0e63004
2020-01-24 13:14:08 +00:00
Jun Nie 936072edbb plat: imx7: Add PicoPi iMX7D basic support
The PicoPi iMX7D is a 2 board development board consisting of
a System-on-Module and a carrier baseboard and optimized for
the Internet-of-Things (IoT).

This patch add basic support to this board.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Louis Mayencourt <louis.mayencourt@arm.com>
Change-Id: I009d85819c4f73b7063aab73d0f6ee74e6ef3fc4
2019-07-17 16:03:20 +08:00
Jun Nie c5937f2d1d plat: imx7: refactor code for reuse
For the iMX7 SOCs, part of the code for platform
setup implementation can be reused and made
common for all these SoCs. This patch extracts
the common part for reuse.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Change-Id: I42fd4167e6903416df96a0159a046abf3896e878
2019-07-17 16:03:20 +08:00
Ambroise Vincent 0821731ac3 warp7: remove old console from makefile
Change-Id: I87818b220568cc34838726b32ddf29ee6cf31ed7
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-06-28 10:52:48 +01:00
Ambroise Vincent 5b6ebeec9c Remove MULTI_CONSOLE_API flag and references to it
The new API becomes the default one.

Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-06-28 10:52:48 +01:00
Ambroise Vincent 2374ab1799 Mbed TLS: Remove weak heap implementation
The implementation of the heap function plat_get_mbedtls_heap() becomes
mandatory for platforms supporting TRUSTED_BOARD_BOOT.

The shared Mbed TLS heap default weak function implementation is
converted to a helper function get_mbedtls_heap_helper() which can be
used by the platforms for their own function implementation.

Change-Id: Ic8f2994e25e3d9fcd371a21ac459fdcafe07433e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-04-12 09:52:52 +01:00
Ying-Chun Liu (PaulLiu) 70086dc466 imx: warp7: Migrate to MULTI_CONSOLE_API
This commit migrates to MULTI_CONSOLE_API for IMX Warp7 board.
We also rename the functions in imx_uart driver to more specific one.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
2019-02-12 18:56:29 +08:00
Antonio Nino Diaz 5e447816c7 Remove unneeded include paths in PLAT_INCLUDES
Also, update platform_def.h guidelines about includes in the porting
guide.

Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-01 12:24:57 +00:00
Bryan O'Donoghue a41d81cdb1 warp7: Enable Trusted Board Boot for WaRP7
This patch enables Trusted Board Boot for warp7. A subsequent patch
contains build/run instructions.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Jun Nie <jun.nie@linaro.org>
2019-01-18 16:10:55 +00:00
Bryan O'Donoghue e483639ad2 warp7: Define DTB overlay address in memory map
This patch defines the expected DTB overlay address in the memory map for
this platform. Its important that all points in the boot process agree on
this memory map even if not all elements utilize it.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-01-18 14:24:09 +00:00
Bryan O'Donoghue c2f31c99fe warp7: io_storage: Remove DTB from FIP
Recently upstreamed changes to OP-TEE mean that it is possible for OP-TEE
to provide a DTB overlay directly to subsequent boot stages thus negating
the requirement to bundle a DTB in the FIP.

This patch switches off the dependency on the DTB in the FIP descriptor
instead we will provide the necessary data as an overlay from OP-TEE.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-01-18 14:24:09 +00:00
Antonio Nino Diaz 09d40e0e08 Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-04 10:43:17 +00:00
Yann Gautier b7c6529c41 io_block: define MAX_IO_BLOCK_DEVICES as unsigned
This is used as a table index, and already compared with an unsigned int:
block_dev_count.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-12-10 18:09:49 +01:00
Antonio Nino Diaz c3cf06f1a3 Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.

The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.

The exceptions are files that are imported from other projects:

- CryptoCell driver
- dt-bindings folders
- zlib headers

Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-08 10:20:19 +00:00
Antonio Nino Diaz 6333e135c5 warp7, ls1043: Remove unneeded include paths
include/plat/arm/common isn't needed by them, and is removed to avoid
dependency on Arm platform code.

Change-Id: Id9fccba33326fd075b3d1029bf1e4b012dfa0483
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-10-30 13:31:36 +00:00
Antonio Nino Diaz 9c675b374a Add plat_crash_console_flush to platforms without it
Even though at this point plat_crash_console_flush is optional, it will
stop being optional in a following patch.

The console driver of warp7 doesn't support flush, so the implementation
is a placeholder.

TI had ``plat_crash_console_init`` and ``plat_crash_console_putc``, but
they weren't global so they weren't actually used. Also, they were
calling the wrong functions.

imx8_helpers.S only has placeholders for all of the functions.

Change-Id: I8d17bbf37c7dad74e134c61ceb92acb9af497718
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-10-25 09:56:09 +01:00
Antonio Nino Diaz 99865e0afe warp7: Migrate to new interfaces
- Fix reference to bl2_el3_early_platform_setup()
- Remove references to removed build options.

Change-Id: I9733bec64fc28db15716ddf481c05bdc30700b4a
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Acked-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-09-28 15:31:53 +01:00
Bryan O'Donoghue 172e55be16 warp7: Add warp7 platform to the build
Previous changes in this series made the necessary driver additions and
updates. With those changes in-place we can add the platform.mk and
bl2_el3_setup.c to drive the boot process.

After this commit its possible to build a fully-functional TF-A for the
WaRP7 and boot from the BootROM to the Linux command prompt in secure or
non-secure mode.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-09-04 14:18:31 +01:00
Bryan O'Donoghue 20c0eca0f2 warp7: panic: hab: Call into BootROM failsafe on panic path
This patch adds a callback into the BootROM's provided High Assurance Boot
(HAB) failsafe function when panicking i.e. the call is done without making
use of stack.

The HAB failsafe function allows a piece of software to call into the
BootROM and place the processor into failsafe mode.

Failsafe mode is a special mode which presents a serial download protocol
interface over UART or USB at the time of writing.

If the board has been set into secure mode, then only a signed binary can
be used to recover the board.

Thus failsafe gives a putatively secure method of performing a secure
recovery over UART or USB.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
2018-09-04 14:18:31 +01:00
Bryan O'Donoghue a22d06ce4a warp7: mem_params_desc: Add boot entries to mem params array
This patch adds entries to the mem params array for

- BL32
- BL32_EXTRA1
- BL32_EXTRA2
- BL33
- HW_CONFIG_ID

BL32 is marked as bootable to indicate that OPTEE is the thing that should
be booted next.

In our model OPTEE chain-loads onto u-boot so only BL32 is bootable.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-09-04 14:18:31 +01:00
Bryan O'Donoghue 5336ebd0a8 warp7: io_storage: Add initial stub warp7_io_storage.c
This commit adds support for parsing a FIP pre-loaded by a previous
boot-phase such as u-boot or via ATF reading directly from eMMC.

[bod: squashing several patches from Rui, Jun and bod]

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-09-04 14:18:31 +01:00
Bryan O'Donoghue c602024808 warp7: Define a platform_def.h
This patch defines a platform_def.h describing

- FIP layout and location
- eMMC device select
- UART identity select
- System clock frequency
- Operational memory map

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-09-04 14:18:31 +01:00
Bryan O'Donoghue 1fe21ca6eb warp7: mem_params_desc: Add a file which exports a REGISTER_BL_IMAGE_DESCS
In order to link even a basic image we need to declare
REGISTER_BL_IMAGE_DESCS. This patch declares an empty structure which is
passed to REGISTER_BL_IMAGE_DESCS(). Later patches will add in some
meaningful data.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-09-04 14:18:31 +01:00
Bryan O'Donoghue 073c91d0ac warp7: Add a warp7_private.h file
Internal declarations for the WaRP7 port will go here. For now just include
sys/types.h.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-09-04 14:18:31 +01:00
Bryan O'Donoghue 82add05bab warp7: image_load: Add warp7_image_load.c
This commit adds warp7_image_load.c with the functions

- plat_flush_next_bl_params()
- plat_get_bl_image_load_info()
- plat_get_next_bl_params()

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-09-04 14:18:31 +01:00
Bryan O'Donoghue 54544c9982 warp7: Add initial warp7_helpers.S
This commit adds a warp7_helpers.S which contains a implementation of:

- platform_mem_init
- plat_get_my_entrypoint
- plat_crash_console_init
- plat_crash_console_putc

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-09-04 14:18:31 +01:00
Bryan O'Donoghue 582547113e imx7: hab_arch: Provide a hab_arch.h file
In order to enable compile time differences in HAB interaction, we should
split out the definition of the base address of the HAB API.

Some version of the i.MX series have different offsets from the BootROM
base for the HAB callback table.

This patch defines the header into which we will define the i.MX7 specific
offset. The offset of the i.MX7 function-callback table is simultaneously
defined.

Once done, we can latch a set of common function pointer locations from the
offset given here and if necessary change the offset for different
processors without any other code-change.

For now all we support is i.MX7 so the only offset being defined is that
for the i.MX7.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
2018-09-04 13:36:23 +01:00
Bryan O'Donoghue 7d46459221 imx7: imx_regs: Add a shared imx-regs.h for i.MX7 ATF platforms
In order to have some common code shared between similar SOCs its pretty
common to have IP blocks reused. In reusing those blocks we frequently need
to map compatible blocks to different addresses depending on the SOC.

This patch adds a basic memory map of the i.MX7 based on the "Cortex-A7
Memory Map" section 2.12 of "i.MX7Solo Applications Processor Reference
Manual, Rev 0.1 08/2016"

In memory map terms the i.MX7S and i.MX7D are identical with the D
variant containing two Cortex-A7 cores plus a Cortex-M core and the S
variant containing one Cortex-A7 and one Cortex-M.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2018-09-04 13:36:22 +01:00