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4 Commits

Author SHA1 Message Date
Jiafei Pan 3a2cc2e262 feat(plat/nxp/common/psci): define CPUECTLR_TIMER_2TICKS 
Define CPUECTLR_TIMER_2TICKS.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iecb5ede82939e8502d2f1bc74ec3bfe2a00be65c
 2021-09-15 11:19:36 +08:00
Jiafei Pan a204785322 feat(plat/nxp/common): define default PSCI features if not defined 
SoC code can define supported features, otherwise use default setting.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I0f11498c1f7558ff0ec2d9b344f3f7a4f5489ced
 2021-09-15 11:19:36 +08:00
Jiafei Pan 35efe7a4ce feat(plat/nxp/common): define common macro for ARM registers 
Define common register macro both for Cortex-A53 and Cortex-A72
because the code will be used by both Cortex platform.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I485661bfe3ed4f214c403ff6af53dc6af1ddf089
 2021-09-15 11:19:36 +08:00
Pankaj Gupta dd4268a2db nxp: psci platform functions used by lib/psci 
Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I9853263ed38fb2a9f04b9dc7d768942e32074719
 2021-03-24 09:49:32 +05:30