Commit Graph

92 Commits

Author SHA1 Message Date
Tanmay Shah fcf6f46931 feat(versal): add SMCCC call TF_A_PM_REGISTER_SGI
This call is used to register and reset SGI interrupt.
Before this functionality was performed using IOCTL_REGISTER_SGI
pm_ioctl EEMI call. It's not correct use of PM_IOCTL as it is
not EEMI functionality. Instead this new SMCCC call will be
handled by TF-A specific handler.

Change-Id: If2408af38b889d29a5c584e8eec5f1672eab4fb5
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
2022-05-12 20:29:41 +02:00
Venkatesh Yadav Abbarapu bf70449ba2 feat(versal): add support to reset SGI
Add "reset" parameter in pm_register_sgi() to reset
SGI number. This will be required if OS wants to reset
SGI number to default state. Caller can reset param to
1 to reset SGI in ATF.

Change-Id: If485ff275df884f74eb67671cac7fa953458afe9
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
2022-05-12 20:29:03 +02:00
Venkatesh Yadav Abbarapu be73459a94 feat(xilinx): add SPP/EMU platform support for versal
This patch adds SPP/EMU platform support for Xilinx Versal and
also updating the documentation.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ibdadec4d00cd33ea32332299e7a00de31dc9d60b
2022-05-02 22:49:24 +02:00
Tanmay Shah 0b15187225 fix(versal): fix coverity scan warnings
- Fix memory overrun issue
- include header file to fix Unknown macro warning

Change-Id: Ibe6fd206f44fbc22de746d255ff17c2b2325cd7b
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
2022-04-27 01:44:20 +02:00
Ronak Jain da6e654bc8 feat(versal): get version for ATF related EEMI APIs
The patch does below things.

1. As per current implementation, when Linux send a request to ATF to
 get the version of APIs which are implemented in ATF then ATF wasn't
 returning any version because there is a check for LIBPM module id.
 The ATF is used to return version for the APIs which are implemented
 in the firmware only.

 Hence moved this switch-case before checking module id to get ATF
 version.

 Also, no need to pass Linux request to the firmware for the APIs
 which are implemented in ATF instead return success after updating
 version.

2. As per current implementation, higher 16-bit is used for ATF
 version and lower 16-bit is used for firmware version. Now, removed
 16-bit shift operation and send complete word i.e. 32-bit to Linux
 user as there is no user who checks ATF version.

3. Add bit mask support in the feature check PM EEMI API for QUERY and
 IOCTL ids.

Change-Id: Icdca3de6659f3b673b81a423ed79a3c20b678768
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
2022-04-27 01:44:11 +02:00
Venkatesh Yadav Abbarapu d34a5db8a7 feat(versal): enhance PM_IOCTL EEMI API to support additional arg
Currently, SMC handler is limited to parsing 5 arguments (1 API ID + 4
32-bit command args). Extend this handling to support one more 32-bit
command argument which is necessary to support new IOCTL IDs for
secure read/write interface.

Note that, this change is completely transparent and does not affect
existing functionality of any of the EEMI APIs.

Change-Id: I72016620eeeaf598f14853512120bfb30bb9a3e9
Signed-off-by: Izhar Ameer Shaikh <izhar.ameer.shaikh@xilinx.com>
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
2022-04-27 01:44:02 +02:00
Tanmay Shah 1397967490 feat(versal): add common interfaces to handle EEMI commands
This change adds common interfaces to handle commands from firmware driver
to power management controller. It removes big chunk of source line of code
that was handling each command separately and doing same repetitive work.

EEMI - Embedded Energy Management Interface is Xilinx proprietary
protocol to allow communication between power management controller
and different processing clusters.

As of now, Each EEMI command has its own implementation in TF-A.
This is redundant. Essentially most EEMI command implementation
in TF-A  does same work. It prepares payload received from kernel, sends
payload to firmware, receives response from firmware and send response
back to kernel.

The same functionality can be achieved if common interface is used among
multiple EEMI commands. This change divides platform management related
SMCCC requests into 4 categories.

1) EEMI commands required for backward compatibility.

Some EEMI commands are still required for backward compatibility
until removed completely or its use is changed to accommodate
common interface

2) EEMI commands that require for PSCI interface and accessed from debugfs

For example EEMI calls related to CPU suspend/resume

3) TF-A specific requests

Functionality such as getting TF-A version and getting callback
data for platform management is handled by this interface

4) Common interface for rest of EEMI commands

This handlers performs payload and firmware response transaction job for
rest of EEMI commands. Also it parses module ID from SMC payload and inserts
in IPI request. If not module ID is found, then default is LIBPM_MODULE_ID.
This helps in making common path in TF-A for all the modules in PLM firmware

Change-Id: I57a2787c7fff9f2e1d1f9003b3daab092632d57e
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
2022-04-27 01:43:41 +02:00
Michal Simek bb1768c67e fix(xilinx): fix coding style violations
Fix coding style violations and alignments:
- Remove additional newlines in headers
- Remove additional newlines in code
- Add newline to separate variable from the code
- Use the same indentation in platform.mk
- Align function parameters
- Use tabs for indentation in kernel-doc format

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I0b12804ff63bc19778e8f21041f9accba5b488b9
2022-03-09 09:14:33 +01:00
Venkatesh Yadav Abbarapu ea04b3fe18 fix(versal): fix the incorrect log message
When the atf-handoff-params are updated we are returning
FSBL_HANDOFF_SUCCESS, but the return condition is wrongly
updated and added a error log which is incorrect.
Fixing the incorrect log message.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I44ebbb861831b86afcb87f09ddb2e23614393c28
2022-03-06 21:09:23 -07:00
Venkatesh Yadav Abbarapu 18e2a79f8a feat(versal): remove the time stamp configuration
Remove the time stamp and system counter configuration, as
this configuration is already done by the first stage bootloader.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I41554dc2e14d97954bff299df9740a5efa30fad9
2022-03-01 21:20:21 -07:00
Venkatesh Yadav Abbarapu 2c791499c2 feat(versal): add UART1 as console
Currently only UART0 is handled as console device, fix the
code to support UART1 as console also.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ifcd3c331cf6ce4afb0074357c92fc4addb9438b6
2021-12-22 03:56:42 -07:00
Abhyuday Godhasara 93d4625627 fix(plat/xilinx/versal): resolve misra R10.6
MISRA Violation: MISRA-C:2012 R.10.6
- The value of a composite expression shall not be assigned to an object
  with wider essential type

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: Ia0d13c3cfeb13d22b6fc7e8869cc713218302973
2021-11-30 02:00:01 -08:00
Abhyuday Godhasara a62c40d427 fix(plat/xilinx/versal): resolve misra R14.4
MISRA Violation: MISRA-C:2012 R.14.4
- The controlling expression of an if statement and the controlling
  expression of an iteration-statement shall have essentially Boolean type.

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I8cf821a42015858200cc0c514600012c8f61061f
2021-11-30 02:00:01 -08:00
Abhyuday Godhasara 526a1fd147 fix(plat/xilinx/versal): resolve misra R17.7
MISRA Violation: MISRA-C:2012 R.17.7
- The value returned by a function having non-void return type shall be
  used ((void) missing for discarded return value.).

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I1e6a598b9fe6c571a3e5010ee832ef860dfe491d
2021-11-30 02:00:01 -08:00
Abhyuday Godhasara b2bb3efb8f fix(plat/xilinx/versal): resolve misra R10.3
MISRA Violation: MISRA-C:2012 R.10.3
- The value of an expression shall not be assigned to an object with a
  narrower essential type or of a different essential type category

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I9c6dd8dba40db8067b46947ceff295732648612a
2021-11-30 02:00:01 -08:00
Abhyuday Godhasara 0623dcea0f fix(plat/xilinx/versal): resolve misra R7.2
MISRA Violation: MISRA-C:2012 R.7.2
- A "u" or "U" suffix shall be applied to all integer constants that are
  represented in an unsigned type

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: Iaf6db75e42913ddceccb803426287d0c47d7f31d
2021-11-30 02:00:01 -08:00
Abhyuday Godhasara bc2637e379 fix(plat/xilinx/versal): resolve misra R15.7
MISRA Violation: MISRA-C:2012 R.15.7
- All if . . else if constructs shall be terminated with an else statement

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: Iea32e32b5683f7accd7fac8d557957f05ed0f5c5
2021-11-30 02:00:01 -08:00
Abhyuday Godhasara b9fa2d9fc1 fix(plat/xilinx/versal): resolve misra R15.6
MISRA Violation: MISRA-C:2012 R.15.6
- The body of an iteration-statement or a selection-statement shall be
  a compound statement

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: If1ccaa2f254ac85a329295de501e2b5558e8ff43
2021-11-30 02:00:01 -08:00
Abhyuday Godhasara 775bf1bbd3 fix(plat/xilinx/versal): resolve misra R10.1 in pm services
MISRA Violation: MISRA-C:2012 R.10.1
- Operands shall not be of an inappropriate essential type.

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I67b5788054a136be8d764472c5d85528a5c4272f
2021-11-30 02:00:01 -08:00
Abhyuday Godhasara 5dada6227b fix(plat/xilinx/versal): resolve misra R20.7 in pm services
MISRA Violation: MISRA-C:2012 R.20.7
- Expressions resulting from the expansion of macro parameters shall be
  enclosed in parentheses

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: Id913c556cab955c798809ad2bd08ca3e48e2231a
2021-11-30 02:00:01 -08:00
Abhyuday Godhasara 5d1c211e22 fix(plat/xilinx/versal): resolve misra R10.3 in pm services
MISRA Violation: MISRA-C:2012 R.10.3
- The value of an expression shall not be assigned to an object with a
  narrower essential type or of a different essential type category

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I73c056ff4df2f14e04c92a49ac5c97e578e82107
2021-11-30 02:00:01 -08:00
Abhyuday Godhasara fa98d7f2f8 fix(plat/xilinx/versal): resolve misra R10.6 in pm services
MISRA Violation: MISRA-C:2012 R.10.6
- The value of a composite expression shall not be assigned to an object
  with wider essential type.

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I67ac6b6b4b643f57e76a435345540e241c9a88b9
2021-11-30 02:00:01 -08:00
Abhyuday Godhasara 27ae531088 fix(plat/xilinx/versal): resolve misra R16.3 in pm services
MISRA Violation: MISRA-C:2012 R.16.3
- An unconditional break statement shall terminate every switch-clause

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I576b2c6eb7d1b7ef20440b9a616886ccf230b63e
2021-11-30 01:59:34 -08:00
Abhyuday Godhasara 4156719550 fix(plat/xilinx/versal): resolve misra R15.6 in pm services
MISRA Violation: MISRA-C:2012 R.15.6
- The body of an iteration-statement or a selection-statement shall be
  a compound statement

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I82e924a77ee3afeb56fa18714e94cc4f6fff5a49
2021-11-30 01:54:51 -08:00
Venkatesh Yadav Abbarapu 302b4dfb8f feat(plat/versal): add support for SLS mitigation
This patch adds the option HARDEN_SLS_ALL that can be used to enable
the -mharden-sls=all, which mitigates the straight-line speculation
vulnerability. Enable this by adding the option HARDEN_SLS_ALL=1,
default this will be disabled.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I0d498d9e96903fcb879993ad491949f6f17769b2
2021-07-20 22:33:47 -06:00
Abhyuday Godhasara fa58171534 fix(plat/xilinx/versal): use sync method for blocking calls
All API calls except non-blocking should wait for
IPI response and read buffer to check return status
from firmware. Some of API calls are not reading
status from IPI payload data. Use sync method which
reads actual return status from IPI payload.

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I6f568b85d0da639c264f507122e3015807d8423d
2021-07-08 05:29:50 -07:00
Rajan Vaja e1e5b1339b fix(plat/xilinx/versal/include): correct IPI buffer offset
Use proper offset for IPI data based on offset for IPI0
channel.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I3070517944dd353c3733aa595df0da030127751a
2021-05-25 07:02:49 -07:00
Venkatesh Yadav Abbarapu 78c7beb49c plat: send an sgi to communicate to linux
Upon recieving the interrupt send an SGI.
The sgi number is communicated by linux.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Change-Id: Ib8f07ff7132ba5ac202b546914efb16d04820ed3
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
2021-04-22 22:47:17 +02:00
Shubhrajyoti Datta 8b48bfb897 plat: xilinx: Error management support
Add support for the trapping the IPI in TF-A.
Register handler for the irq no 62 which is the IPI interrupt.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Change-Id: I9c04fdae7be3dda6a34a9b196274c0b5fdf39223
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
2021-04-22 22:47:12 +02:00
Venkatesh Yadav Abbarapu 654bd99dc6 plat: xilinx: versal: Add the IPI CRC checksum macro support
Add support for CRC checksum for IPI data when the macro
IPI_CRC_CHECK is enabled.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I3c25c715885759076055c6505471339b5d6edcd5
2021-04-21 12:19:32 +02:00
Venkatesh Yadav Abbarapu 0b25f4045a plat:xilinx:versal: Add JTAG DCC support
As per the new multi-console framework, updating the JTAG DCC support.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I77994ce387caf0d695986df3d01d414a920978d0
2021-03-31 22:00:21 -06:00
Tejas Patel 4697164a3f plat: xilinx: versal: Mark IPI calls secure/non-secure
BIT24 of IPI command header is used to determine if caller is
secure or non-secure.

Mark BIT24 of IPI command header as non-secure if SMC caller
is non-secure.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: Iec25af8f4b202093f58e858ee47cd9cd46890267
2021-03-19 07:47:12 -07:00
Michal Simek 4a7b060b3d plat: xilinx: versal: Remove cortex-a53 compilation
Versal is a72 based that's why there is no reason to build low level
assemble code for a53.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: Iff9cf2582102d951825b87fd9af18e831ca717d6
2021-03-16 13:17:37 +01:00
Rajan Vaja f621d5fb4b plat: xilinx: versal: Remove code duplication
Some switch cases uses same operation. So, club switch cases
which uses same operation and remove duplicate code.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I260b474c0ff3f2ca102c32d4af2e4abba2b8f57c
2021-01-20 00:59:33 -08:00
Venkatesh Yadav Abbarapu e43258fa00 plat: xilinx: Fix non-MISRA compliant code
This patch fixes the non compliant code like missing braces for
conditional single statement bodies.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I95b410ae5950f85dc913c4448fcd0a97e0fd490c
2021-01-10 20:48:09 -07:00
Manish Pandey a82b5f70fb xilinx: versal: fix static failure
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Icef550072296d6aba89a0827dd72d0b86047556f
2020-12-10 10:48:22 +00:00
Tejas Patel 6af1228677 plat: xilinx: versal: Add support of register notifier
Add support of register notifier.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I41ef4c63abcc9aee552790b843adb25a5fd0c23e
2020-12-07 11:10:19 +00:00
Tejas Patel b6d7b3e9d6 plat: xilinx: versal: Add support to get clock rate value
Add support to get clock's rate value.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I3ed881053ef323b2ca73e13edd0affda860d381d
2020-12-07 11:10:13 +00:00
Tejas Patel 07d8a5f7dc plat: xilinx: versal: Add support of set max latency for the device
Add support of set max latency, to change in the maximum powerup latency
requirements for a specific device currently used by Subsystem.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I8749886abb1a7884a42c4d156d89c9cd562a5b1a
2020-12-07 11:10:07 +00:00
Ravi Patel 2cc1fa9537 plat: versal: Add InitFinalize API call
Add support to call InitFinalize API in Versal which calls
corresponding LibPM API.

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I3428b7245b4db1ef6db8a90b7ad20b6e484ed3b2
2020-12-07 11:10:01 +00:00
Rajan Vaja 1ba2d84fe2 xilinx: versal: Updated Response of QueryData API call
For the current XilPM calls, The handler of IPI returns information
with 16 Bytes data.
So during QueryData API call for the ClockName and PinFunctionName,
response data(name of clock or function) response[0..3] are used to
return name. And status is not being returned for such API.

Updated XilPM calls reply in a consistent way and The handler of IPI
return information with 32Bytes data. Where response[0] always set
to status.
For the version-2 of QueryData API, during call for the ClockName
and PinFunctionName, response data(name of clock or function) get as
response[1...4].

To support both the version of QueryData API, added version based
compatibility by the use of feature check.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I336128bff7bbe659903b0f8ce20ae6da7e3b51b4
2020-12-07 11:09:56 +00:00
Venkatesh Yadav Abbarapu abf27efac6 plat:xilinx:versal: Use defaults when PDI is without sw partitions
In JTAG mode check the ATF handoff structure, if the magic string
is not present then use bl32 and bl33 default values.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I1f2c4a2060d8a2e70d3b5fb2473124b685f257fc
2020-12-07 11:09:47 +00:00
Ravi Patel d4c7b55050 xilinx: versal: Skip store/restore of GIC during CPU idle
GIC registers needs to be stored/restored during system
suspend/resume only and not during CPU idle.
During CPU idle, minimum 1 CPU is in ON state.

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I5de2ce3a61bf4260f9385349202b0f592a47aaba
2020-12-07 11:07:41 +00:00
Venkatesh Yadav Abbarapu 4b8ab607ea plat: versal: Update API list in feature check
Add below API in feature check list which is actually present in
firmware:
- PM_GET_CHIPID

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I98b82da74164f065c8835861f74b0f2855e9bcbf
2020-12-07 11:07:32 +00:00
Ravi Patel b05d2792ae xilinx: versal: Do not pass ACPU0 always in set_wakeup_source()
Existing code passes ACPU0 to LibPM as node_id in set_wakeup_source()
call because last suspending core will be ACPU0 in most of the case.

Now it may be possible that user may disable the ACPU0 using hot-plug
and after that it suspends Linux. So in that case ACPU0 will not be
last suspending core.

To overcome above scenario, pass the current running processor ID
while calling set_wakeup_source().

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: If15354c2150b5bb1305b5f93ca4e8c7a81d59f0a
2020-12-07 11:07:24 +00:00
Olivier Deprez 8eceb1c9c4 Merge "Create separate header for ARM specific SMCCC defines" into integration 2020-03-31 14:16:40 +00:00
Manish V Badarkhe 53adebad8b Create separate header for ARM specific SMCCC defines
Moved SMCCC defines from plat_arm.h to new <smccc_def.h> header
and include this header in all ARM platforms.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I4cbc69c7b9307461de87b7c7bf200dd9b810e485
2020-03-30 12:21:38 +00:00
Alexei Fedorov a6ea06f563 TF-A GICv3 driver: Introduce makefile
This patch moves all GICv3 driver files into new added
'gicv3.mk' makefile for the benefit of the generic driver
which can evolve in the future without affecting platforms.
The patch adds GICv3 driver configuration flags
'GICV3_IMPL', 'GICV3_IMPL_GIC600_MULTICHIP' and
'GICV3_OVERRIDE_DISTIF_PWR_OPS' described in
'GICv3 driver options' section of 'build-option.rst'
document.

NOTE: Platforms with GICv3 driver need to be modified to
include 'drivers/arm/gic/v3/gicv3.mk' in their makefiles.

Change-Id: If055f6770ff20f5dee5a3c99ae7ced7cdcac5c44
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-03-30 10:54:01 +00:00
Alexei Fedorov 6e19bd563d TF-A GICv3 driver: Separate GICD and GICR accessor functions
This patch provides separation of GICD, GICR accessor
functions and adds new macros for GICv3 registers access
as a preparation for GICv3.1 and GICv4 support.
NOTE: Platforms need to modify to include both
'gicdv3_helpers.c' and 'gicrv3_helpers.c' instead of the
single helper file previously.

Change-Id: I1641bd6d217d6eb7d1228be3c4177b2d556da60a
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-03-10 09:40:19 +00:00
Andre Przywara f695e1e01a pl011: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.

Change-Id: I7a23327394d142af4b293ea7ccd90b843c54587c
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-02-25 09:34:38 +00:00