Commit Graph

12 Commits

Author SHA1 Message Date
Shelley Chen b8a05116ed feat(plat/qti/sc7280): add support for pmk7325
The qti sc7280 platform uses the pmk7325 PMIC, which has the same
functionality as the pm8998 driver, with the exception of the LC
PON register offsets, which are defined as:

Since it is nearly identical to the pm8998 driver, moving the above
register offset definitions to platform_def.h for the respective SoC
and reusing the rest of the functions defined in the pm8998 driver.
Renaming pm8998 driver to pm_ps_hold to make it more generic.

Change-Id: I0dda3a54579e0bbdd42c247405362a86d0607478
Signed-off-by: Shelley Chen <shchen@chromium.org>
2021-10-12 23:51:59 +02:00
Saurabh Gorecha 46ee50e0b3 feat(plat/qti/sc7280): support for qti sc7280 plat
new qti platform sc7280 support addition

Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org>
Change-Id: I3dd99d8744a6c313f7dfbbee7ae2cbd6f21656c1
2021-09-22 10:05:45 +02:00
Saurabh Gorecha cc35a3771d fix(plat/qti/sc7180): qti smc addition
Adding QTI SIP SMC CALL to detect qti platform supporting ARM 64 SMC
calls or not.

Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org>
Change-Id: I3231325a6ffe5aa69856dd25ac2c0a2004484e4b
2021-09-08 01:19:47 +05:30
Julius Werner de67080fbe qti: spmi_arb: Fix NUM_APID and REG_APID_MAP() argument
The NUM_APID value was derived from kernel device tree sources, but I
made a conversion mistake: the amount of bytes in the APID map is the
total size of the "core" register range (0x1100) minus the offset of the
APID map in that range (0x900). This is of course 0x1100 - 0x900 = 0x800
and not 0x200, so the amount of 4-byte integers it can fit is not 0x80
but 0x200. Fix this and make the math more explicit so it can be more
easily factored out and adjusted if that becomes necessary for a future
SoC.

Also fix a dangerous typo in REG_APID_MAP() where the macro would
reference a random variable `i` rather than its argument (`apid`), and
we just got lucky that the only caller in the current code happened to
pass in a variable called `i` as that argument.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I049dd044fa5aeb65be0e7b12150afd6eb4bac0fa
2021-02-03 15:37:02 -08:00
Saurabh Gorecha 7a0f795ee7 plat:qti Mandate SMC implementaion
renamed smcc api with correct name  plat_is_smccc_feature_available

Change-Id: I277ece02bffc2caa065256576c1a047dfcde1c92
Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org>
2020-11-20 01:09:52 +05:30
Saurabh Gorecha 4b918452bd plat:qti Mandate SMC implementaion and bug fix
implementation of SMC call SMCCC_ARCH_SOC_ID
adding debugging logs in mem assign call.
Checking range of param in mem_assign call is from CB_MEM_RAM
or CB_MEM_RESERVED.

Change-Id: Iba51bff154df01e02dcb7715582ffaff7beba26e
Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org>
2020-10-16 02:23:35 +05:30
Julius Werner 9694c2104c qti: spmi_arb: Fix coverity integer conversion warnings
Coverity warns about the risk of unintended sign-exension in some of the
calculations in spmi_arb.c. While the actual numbers used are small
enough that this cannot happen in practice, it's still a good idea to
clean them up by explicitly making the constants used unsigned.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Ia169e0f7c6b01b8041e8029e8c8d30ee596ba30d
2020-08-27 16:31:03 -07:00
Julius Werner 522a22771f qti/sc7180: Do shutdown handling outside qtiseclib
With an open source SPMI driver we can now remove qtiseclib involvement
in reset and shutdown handling by setting the required registers
directly.

Change-Id: I6bf1db15734048df583daa2a4ee98701c6ece621
Signed-off-by: Julius Werner <jwerner@chromium.org>
2020-08-25 17:36:13 -07:00
Julius Werner f40008a4be qti: Add SPMI PMIC arbitrator driver
This patch adds a very rudimentary driver for the SPMI arbitrator used
to access the PMIC. It doesn't support all the controller's actual
arbitration features, so it should probably not be used concurrently
with a running kernel (and it's also not optimized for performance). But
it can be used to set a few registers during boot or on shutdown to
control reset handling, which is all we need it for.

Change-Id: I8631c34a2a89ac71aa1ec9b8266e818c922fe34a
Signed-off-by: Julius Werner <jwerner@chromium.org>
2020-08-24 18:38:47 -07:00
Manish V Badarkhe 752ff3bfd8 plat: qti: Fix build failure
Fixed build failure due to the commit:905f93c77 by removing
the inclusion of non-existent 'stdinit.h' file.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I8e3ca69c016b7a2354c58c4d384a492631c36286
2020-08-18 01:53:45 +00:00
Saurabh Gorecha 905f93c770 qti: Add RNG driver
This patch adds RNG driver and use it to generate random number for stack
protection.

Change-Id: I73d79e68d08b5aa902dc7fad48e17a03f996178d
Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org>
2020-08-13 17:13:49 +00:00
Saurabh Gorecha 5bd9c17d02 sc7180 platform support
Adding support for QTI CHIP SC7180 on ATF

Change-Id: I0d82d3a378036003fbd0bc4784f61464bb76ea82
Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org>
Co-authored-by: Maulik Shah <mkshah@codeaurora.org>
2020-08-10 09:53:02 +05:30