Commit Graph

10771 Commits

Author SHA1 Message Date
Dave Gerlach 2393c27680 feat(ti): add PSCI handlers for system suspend
Add necessary K3 PSCI handlers to enable system suspend to be reported
in the PSCI capabilities when asked during OS boot.

Additionally, have the handlers provide information that all domains
should be off and also have the power domain suspend handler invoke the
TISCI_MSG_ENTER_SLEEP message to enter system suspend.

Change-Id: I351a16167770e9909e8ca525ee0d74fa93331194
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-27 12:06:53 -05:00
Dave Gerlach b40a467783 feat(ti): add gic save and restore calls
Add functions to save and restore GICv3 redist and dist contexts during
low power mode and then call these during the suspend entry and finish
psci handlers.

Change-Id: I26c2c0f3b7fc925de3b349499fa42d2405441577
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-27 12:06:53 -05:00
Dave Gerlach cf5868b8cd feat(ti): add enter sleep method
This TISCI API must be used to trigger entry into system suspend, and
this is done through the use of TI_SCI_MSG_ENTER_SLEEP. Introduce a
method to send this message.

Change-Id: Id7af5fb2a34623ad69e76764f389ff4d8d259fba
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-27 12:06:53 -05:00
Madhukar Pappireddy 19a9cc3a1b Merge "docs(zynqmp): update the make command" into integration 2022-04-27 16:41:21 +02:00
Madhukar Pappireddy 3dbbd41f39 Merge changes Ibe6fd206,Icdca3de6,I72016620,I57a2787c into integration
* changes:
  fix(versal): fix coverity scan warnings
  feat(versal): get version for ATF related EEMI APIs
  feat(versal): enhance PM_IOCTL EEMI API to support additional arg
  feat(versal): add common interfaces to handle EEMI commands
2022-04-27 16:40:38 +02:00
Manish Pandey 9284d2129e Merge "refactor(twed): improve TWED enablement in EL-3" into integration 2022-04-27 11:01:52 +02:00
Manish Pandey fa4751f245 Merge changes from topic "st_clk_fix" into integration
* changes:
  fix(st-clock): correct stm32_clk_parse_fdt_by_name
  fix(st-clock): check _clk_stm32_get_parent return
2022-04-27 10:35:12 +02:00
Venkatesh Yadav Abbarapu e8e7cdf3d6 docs(zynqmp): update the make command
Update the make command with the RESET_TO_BL31=1 addition.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I46cc81abb539773706348464b3061d20d94522e9
2022-04-27 08:42:27 +05:30
Tanmay Shah 0b15187225 fix(versal): fix coverity scan warnings
- Fix memory overrun issue
- include header file to fix Unknown macro warning

Change-Id: Ibe6fd206f44fbc22de746d255ff17c2b2325cd7b
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
2022-04-27 01:44:20 +02:00
Ronak Jain da6e654bc8 feat(versal): get version for ATF related EEMI APIs
The patch does below things.

1. As per current implementation, when Linux send a request to ATF to
 get the version of APIs which are implemented in ATF then ATF wasn't
 returning any version because there is a check for LIBPM module id.
 The ATF is used to return version for the APIs which are implemented
 in the firmware only.

 Hence moved this switch-case before checking module id to get ATF
 version.

 Also, no need to pass Linux request to the firmware for the APIs
 which are implemented in ATF instead return success after updating
 version.

2. As per current implementation, higher 16-bit is used for ATF
 version and lower 16-bit is used for firmware version. Now, removed
 16-bit shift operation and send complete word i.e. 32-bit to Linux
 user as there is no user who checks ATF version.

3. Add bit mask support in the feature check PM EEMI API for QUERY and
 IOCTL ids.

Change-Id: Icdca3de6659f3b673b81a423ed79a3c20b678768
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
2022-04-27 01:44:11 +02:00
Venkatesh Yadav Abbarapu d34a5db8a7 feat(versal): enhance PM_IOCTL EEMI API to support additional arg
Currently, SMC handler is limited to parsing 5 arguments (1 API ID + 4
32-bit command args). Extend this handling to support one more 32-bit
command argument which is necessary to support new IOCTL IDs for
secure read/write interface.

Note that, this change is completely transparent and does not affect
existing functionality of any of the EEMI APIs.

Change-Id: I72016620eeeaf598f14853512120bfb30bb9a3e9
Signed-off-by: Izhar Ameer Shaikh <izhar.ameer.shaikh@xilinx.com>
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
2022-04-27 01:44:02 +02:00
Tanmay Shah 1397967490 feat(versal): add common interfaces to handle EEMI commands
This change adds common interfaces to handle commands from firmware driver
to power management controller. It removes big chunk of source line of code
that was handling each command separately and doing same repetitive work.

EEMI - Embedded Energy Management Interface is Xilinx proprietary
protocol to allow communication between power management controller
and different processing clusters.

As of now, Each EEMI command has its own implementation in TF-A.
This is redundant. Essentially most EEMI command implementation
in TF-A  does same work. It prepares payload received from kernel, sends
payload to firmware, receives response from firmware and send response
back to kernel.

The same functionality can be achieved if common interface is used among
multiple EEMI commands. This change divides platform management related
SMCCC requests into 4 categories.

1) EEMI commands required for backward compatibility.

Some EEMI commands are still required for backward compatibility
until removed completely or its use is changed to accommodate
common interface

2) EEMI commands that require for PSCI interface and accessed from debugfs

For example EEMI calls related to CPU suspend/resume

3) TF-A specific requests

Functionality such as getting TF-A version and getting callback
data for platform management is handled by this interface

4) Common interface for rest of EEMI commands

This handlers performs payload and firmware response transaction job for
rest of EEMI commands. Also it parses module ID from SMC payload and inserts
in IPI request. If not module ID is found, then default is LIBPM_MODULE_ID.
This helps in making common path in TF-A for all the modules in PLM firmware

Change-Id: I57a2787c7fff9f2e1d1f9003b3daab092632d57e
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
2022-04-27 01:43:41 +02:00
Madhukar Pappireddy 2fe9d05853 Merge "feat(tc): enable CI-700 PMU for profiling" into integration 2022-04-26 23:16:53 +02:00
Rupinderjit Singh fbfc59840f feat(tc): enable CI-700 PMU for profiling
Change-Id: Iaafdfc440b362022e6103eabf3fb2ebed85b6575
Signed-off-by: Rupinderjit Singh <rupinderjit.singh@arm.com>
2022-04-26 22:29:32 +02:00
Samuel Holland e2b18771fc feat(allwinner): provide CPU idle states to the rich OS
When using SCPI as the PSCI backend, firmware can wake up the CPUs and
cluster from sleep, so CPU idle states are available for the rich OS to
use. In that case, advertise them to the rich OS via the DTB.

Change-Id: I718ef6ef41212fe5213b11b4799613adbbe6e0eb
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 17:52:43 +02:00
Samuel Holland 52466ec38e feat(allwinner): simplify CPU_SUSPEND power state encoding
Use the encoding recommended by the PSCI specification: four bits for
the power state at each power level.

SCPI provides no way to handshake an exit from a standby state, so the
only possible standby state is the architectural WFI state. Since WFI
can be used outside of PSCI, we do not allow passing in standby states.

Change-Id: I4b3b84e5c255ee58a25255a0cab5d7623425086e
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 17:52:37 +02:00
Samuel Holland 159c36fd2f feat(allwinner): choose PSCI states to avoid translation
Aligning the PSCI and SCPI power states avoids some code to translate
between the two. This also makes room for an intermediate power state,
for future firmware capability growth.

Change-Id: I26691085f277a96bd405e3305ab0fe390a92b418
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 17:52:31 +02:00
Samuel Holland 2b2b565717 feat(fdt): add the ability to supply idle state information
Some platforms require extra firmware to implement CPU_SUSPEND, or only
have working CPU_SUSPEND in certain configurations. On these platforms,
CPU idle states should only be listed in the devicetree when they are
actually available. Add a function BL31 can use to dynamically supply
this idle state information.

Change-Id: I64fcc288303faba8abec4f59efd13a04220d54dc
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 17:52:25 +02:00
Samuel Holland 79808f10c3 fix(allwinner): improve DTB patching error handling
Currently, if any step of the DTB patching process fails, the whole
process is aborted. However, this causes some problems:
 - If any step modifies the DTB (including fdt_open_into), the dcache
   must still be cleaned, even if some later step fails.
 - The DTB may need changes in multiple places; if one patch fails (for
   example due to missing nodes), we should still apply other patches.
 - Similarly, if some patch fails, we should still run fdt_pack to
   clean up after ourselves.

Change-Id: If1af2e58e5a7edaf542354bb8a261dd1c3da1ad0
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 17:52:20 +02:00
Samuel Holland 3ccccc6580 refactor(allwinner): patch the DTB after setting up PSCI
Idle states are advertised to the rich OS by declaring them in the DTB.
Since the availability of idle states depends on which PSCI
implementation was chosen, the DTB must be updated after PSCI setup.

Move this operation to bl31_plat_runtime_setup, the platform hook
which happens at the right time. Defining this hook overrides the weak
definition from plat/common, so copy over the code from there, too.

Change-Id: I42a83edb9cb28e1803d17dc2d73dbc879d885222
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 17:52:11 +02:00
Andre Przywara 6fa8e72e7b refactor(allwinner): move DTB change code into allwinner/common
So far the H616 was the only Allwinner SoC needed to amend the DTB, to
reserve the DRAM portion that BL31 occupies.
To allow other SoCs to modify the DTB as well, without duplicating code,
move the DTB change routines into Allwinner common code, and generalise
the current code to allow other modifications.

No functional change intended.

Change-Id: I080ea07b6470367f3c2573a4368f8ef5196d411c
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 15:43:46 +02:00
Manish V Badarkhe a0d3df66f3 docs(fvp): specify correct reference of the hw_config address
TB_FW_CONFIG DT no longer contains the address of HW_CONFIG; it has
been moved to the FW_CONFIG DT since the introduction of FCONF.
Hence updated the documentation accordingly.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I37b68502a89dbd521acd99f2cb3aeb0bd36a04e0
2022-04-26 12:02:43 +01:00
Joanna Farley e61c00fa4b Merge "docs(intel): add Sieu Mun and Benjamin Jit Loon as maintainers" into integration 2022-04-26 12:18:18 +02:00
Sandrine Bailleux ab1c943981 Merge changes from topic "sb/mbedtls-2.28" into integration
* changes:
  docs(prerequisites): upgrade to mbed TLS 2.28.0
  build(deps): upgrade to mbed TLS 2.28.0
2022-04-26 07:49:06 +02:00
anans a475518337 fix(ufs): read and write attribute based on spec
according to the spec, the response to read attr comes in the
ts.attr.value field and not in the data segment.

Signed-off-by: anans <anans@google.com>
Change-Id: Iaf21883bb7e364fd7c7e4bccb33359367a0cf99d
2022-04-26 06:13:06 +02:00
anans b3f03b2013 fix(ufs): disables controller if enabled
ufs controller needs to be disabled if already enabled, without
this we noticed a crash at linkstartup during reinit

Signed-off-by: anans <anans@google.com>
Change-Id: I523c5d57c1d34f6404a6368ee3f364fbffd2e542
2022-04-26 06:12:37 +02:00
Madhukar Pappireddy b08a199b40 Merge "fix(xilinx): fix mismatching function prototype" into integration 2022-04-26 04:45:16 +02:00
Lauren Wehrmeister 394f2ea034 Merge changes Iccfa7ec6,Ide9a7af4 into integration
* changes:
  feat(intel): add macro to switch between different UART PORT
  feat(intel): add SMC support for ROM Patch SHA384 mailbox
2022-04-25 23:02:07 +02:00
Lauren Wehrmeister cb1247e46a Merge "fix(bakery_lock): add __unused for clang" into integration 2022-04-25 22:08:31 +02:00
Madhukar Pappireddy 91665f49c3 Merge "fix(ufs): fix cache maintenance issues" into integration 2022-04-25 20:59:58 +02:00
Madhukar Pappireddy 5b44657a97 Merge changes from topic "st_fwu_bkp_reg" into integration
* changes:
  feat(stm32mp1): retry 3 times FWU trial boot
  refactor(stm32mp1): update backup reg for FWU
2022-04-25 19:28:33 +02:00
Sandrine Bailleux 5cae337337 docs(prerequisites): upgrade to mbed TLS 2.28.0
Upgrade to the latest and greatest 2.x release of Mbed TLS library
(i.e. v2.28.0) to take advantage of their bug fixes.

Note that the Mbed TLS project published version 3.x some time
ago. However, as this is a major release with API breakages, upgrading
to 3.x might require some more involved changes in TF-A, which we are
not ready to do. We shall upgrade to mbed TLS 3.x after the v2.7
release of TF-A.

Change-Id: I887dfd87893169c7be53b986e6c43338d15949d7
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-04-25 10:26:10 +02:00
Sandrine Bailleux a93084be95 build(deps): upgrade to mbed TLS 2.28.0
Upgrade to the latest and greatest 2.x release of Mbed TLS library
(i.e. v2.28.0) to take advantage of their bug fixes.

Note that the Mbed TLS project published version 3.x some time
ago. However, as this is a major release with API breakages, upgrading
to 3.x might require some more involved changes in TF-A, which we are
not ready to do. We shall upgrade to mbed TLS 3.x after the v2.7
release of TF-A.

Actually, the upgrade this time simply boils down to including the new
source code module 'constant_time.c' into the firmware.

To quote mbed TLS v2.28.0 release notes [1]:

  The mbedcrypto library includes a new source code module
  constant_time.c, containing various functions meant to resist timing
  side channel attacks. This module does not have a separate
  configuration option, and functions from this module will be
  included in the build as required.

As a matter of fact, if one is attempting to link TF-A against mbed
TLS v2.28.0 without the present patch, one gets some linker errors
due to missing symbols from this new module.

Apart from this, none of the items listed in mbed TLS release
notes [1] directly affect TF-A. Special note on the following one:

  Fix a bug in mbedtls_gcm_starts() when the bit length of the iv
  exceeds 2^32.

In TF-A, we do use mbedtls_gcm_starts() when the firmware decryption
feature is enabled with AES-GCM as the authenticated decryption
algorithm (DECRYPTION_SUPPORT=aes_gcm). However, the iv_len variable
which gets passed to mbedtls_gcm_starts() is an unsigned int, i.e. a
32-bit value which by definition is always less than 2**32. Therefore,
we are immune to this bug.

With this upgrade, the size of BL1 and BL2 binaries does not appear to
change on a standard sample test build (with trusted boot and measured
boot enabled).

[1] https://github.com/Mbed-TLS/mbedtls/releases/tag/v2.28.0

Change-Id: Icd5dbf527395e9e22c8fd6b77427188bd7237fd6
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-04-25 10:23:52 +02:00
Sandrine Bailleux bc7b709863 Merge "docs(prerequisites): update Arm compilers download link" into integration 2022-04-25 10:05:08 +02:00
Sandrine Bailleux 71a5543bcf docs(prerequisites): update Arm compilers download link
Right now, TF-A documentation recommends downloading Arm compilers
from:

  https://developer.arm.com/open-source/gnu-toolchain/gnu-a/downloads

However, this page is now deprecated, as indicated by the banner at
the top of the page. When navigating to the new recommended page, one
can see the following note, which provides the rationale for the
deprecation:

  GNU Toolchain releases from Arm were published previously as two
  separate releases - one for A-profile and the other for R & M
  profiles (GNU Toolchain for A-profile processors and GNU Arm
  Embedded Toolchain).

  Arm GNU Toolchain releases unifies these two into a single release
  and the previous way of releases therefore have been
  discontinued. However, the previous releases will continue to be
  available for reference.

This patch updates the link to the new recommended place for compiler
downloads.

Change-Id: Iefdea3866a1af806a5db2d2288edbb63c543b8ee
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-04-25 08:19:44 +02:00
Sandrine Bailleux 94909893df Merge "docs: fix mailing lists URLs" into integration 2022-04-25 07:58:46 +02:00
anans 50593e696e refactor(ufs): adds a function for fdeviceinit
time taken for device init varies based on different devices,
instead of waiting for 200ms - we can poll on fdevice init
until it gets cleared, similar to what linux does

Change-Id: I571649231732fde0cd6d5be89b6f14fe905fcaff
Signed-off-by: anans <anans@google.com>
2022-04-25 05:47:35 +02:00
Sieu Mun Tang 5ca81820de docs(intel): add Sieu Mun and Benjamin Jit Loon as maintainers
Add Sieu Mun Tang and Benjamin Jit Loon Lim as new
Intel SocFPGA platform maintainers and remove the
rest of the Intel SocFPGA platform maintainers.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ieb9a35e278d70a12351aaccab90ddc7be09dc861
2022-04-23 09:50:35 +08:00
Olivier Deprez 65b13bace4 Merge changes from topic "ffa_el3_spmc" into integration
* changes:
  feat(spmc): add support for direct req/resp
  feat(spmc): add support for handling FFA_ERROR ABI
  feat(spmc): add support for FFA_MSG_WAIT
  feat(spmc): add function to determine the return path from the SPMC
  feat(spmd): enable handling of FF-A SMCs with the SPMC at EL3
  feat(spmd): update SPMC init flow to use EL3 implementation
  feat(spmc): add FF-A secure partition manager core
  feat(spmc): prevent read only xlat tables with the EL3 SPMC
  feat(spmc): enable building of the SPMC at EL3
  refactor(spm_mm): reorganize secure partition manager code
2022-04-22 21:09:13 +02:00
Manish Pandey 115748b209 Merge "fix(stm32mp1): correct dtc version check" into integration 2022-04-22 17:22:59 +02:00
Yann Gautier 429f10e336 fix(stm32mp1): correct dtc version check
Depending on the shell used, the grep command can fail, leading to
a wrong dtc version detection. Correct that by adding quotes.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I329ec929559c94bf1bf99b127662c9d978e067cf
2022-04-22 13:23:22 +02:00
Olivier Deprez 6f8674964b Merge "feat(spm): add FFA_RX_ACQUIRE forwarding in SPMD" into integration 2022-04-21 11:35:42 +02:00
Sandrine Bailleux f4a55e6b32 docs: fix mailing lists URLs
With the transition to mailman3, the URLs of TF-A and TF-A Tests
mailing lists have changed. However, we still refer to the old
location, which are now dead links.

Update all relevant links throughout the documentation.

There is one link referring to a specific thread on the TF-A mailing
list in the SPM documentation, for which I had to make a guess as to
what's the equivalent mailman3 URL. The old URL scheme indicates that
the thread dates from February 2020 but beyond that, I could not make
sense of the thread id within the old URL so I picked the most likely
match amongst the 3 emails posted on the subject in this time period.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Reported-by: Kuohong Wang <kuohong.wang@mediatek.com>
Change-Id: I83f4843afd1dd46f885df225931d8458152dbb58
2022-04-21 10:26:23 +02:00
Marc Bonnici 9741327df5 feat(spmc): add support for direct req/resp
Enable the SPMC to handle FFA_MSG_SEND_DIRECT_REQ and
FFA_MSG_SEND_DIRECT_RESP ABIs.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ia196c7405993f600e4fdbf467397ea3fb035a62a
2022-04-20 19:40:31 +01:00
Marc Bonnici d663fe7a30 feat(spmc): add support for handling FFA_ERROR ABI
This ABI is only valid during SP initialisation to indicate
failure. If this occurs during SP initialisation signal a failure,
otherwise respond with a not supported error code.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I0182a1641c0f6850e82173af333be79b594f2318
2022-04-20 19:40:31 +01:00
Marc Bonnici c4db76f066 feat(spmc): add support for FFA_MSG_WAIT
Handle an incoming call of FFA_MSG_WAIT from the secure world
and update the runtime state of the calling partition accordingly.

This ABI can be called in the following scenarios:
  - Used by an SP to signal it has finished initializing.
  - To resume the normal world after handling a secure interrupt
    that interrupted the normal world.
  - To relinquish control back to the normal world.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I929713a2280e8ec291b5b4e8f6d4b49df337228c
2022-04-20 19:40:31 +01:00
Marc Bonnici 20fae0a7ce feat(spmc): add function to determine the return path from the SPMC
Use knowledge of the target partition ID and source security state
to determine which route should be used to exit the SPMC.

There are 3 exit paths:
1) Return to the normal world via the SPMD, this will take care of
   switching contexts if required.
2) Return to the secure world when the call originated in the normal
   world and therefore switch contexts.
3) Return to the secure world when the call originated in the secure
   world, therefore we can return directly.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I4037f3a8a8519e2c9f1876be92806d2c41d0d154
2022-04-20 19:40:31 +01:00
Marc Bonnici bb01a67306 feat(spmd): enable handling of FF-A SMCs with the SPMC at EL3
Any FF-A SMC that arrives from the normal world is handled by the
SPMD before being forwarded to the SPMC. Similarly any SMC
arriving from the secure world will hit the SPMC first and be
forwarded to the SPMD if required, otherwise the SPMC will
respond directly.

This allows for the existing flow of handling FF-A ABI's when
the SPMC resides at a lower EL to be preserved.

In order to facilitate this flow the spmd_smc_forward function
has been split and control is either passed to the SPMC or it is
forwarded as before. To allow this the flags and cookie parameters
must now also be passed into this method as the SPMC must be able to
provide these when calling back into the SPMD handler as appropriate.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I84fee8390023295b9689067e14cd25cba23ca39b
2022-04-20 19:40:28 +01:00
Marc Bonnici 6da76075bf feat(spmd): update SPMC init flow to use EL3 implementation
Allow the SPMD to initialise an SPMC implementation at EL3 directly
rather than at a lower EL.
This includes removing the requirement to parse an SPMC manifest to
obtain information about the SPMC implementation, in this case since the
SPMD and SPMC reside in the same EL we can hardcode the required
information directly.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I66d1e1b3ec2d0abbfc28b011a32445ee890a331d
2022-04-20 18:29:32 +01:00
Marc Bonnici 5096aeb2ba feat(spmc): add FF-A secure partition manager core
This patch introduces the core support for enabling an SPMC in EL3
as per the FF-A spec.

The current implemented functionality is targeted to enable
initialization of the SPMC itself and initial support for
bringing up a single S-EL1 SP.

This includes initialization of the SPMC's internal state,
parsing of an SP's manifest, preparing the cpu contexts and
appropriate system registers for the Secure Partition.

The spmc_smc_handler is the main handler for all incoming SMCs
to the SPMC, FF-A ABI handlers and functionality will
be implemented in subsequent patches.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ib33c240b91e54cbd018a69fec880d02adfbe12b9
2022-04-20 18:29:30 +01:00