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Author SHA1 Message Date
Bipin Ravi 5f802c8832 fix(security): workaround for CVE-2022-23960 for A76AE, A78AE, A78C 
Implements the loop workaround for Cortex-A76AE, Cortex-A78AE and
Cortex-A78C.

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
Change-Id: I5c838f5b9d595ed3c461a7452bd465bd54acc548
 2022-03-21 08:57:09 -05:00
Varun Wadekar 47d6f5ff16 feat(cpus): workaround for Cortex A78 AE erratum 1941500 
Cortex A78 AE erratum 1941500 is a Cat B erratum that applies
to revisions <= r0p1. It is still open.

This erratum is avoided by by setting CPUECTLR_EL1[8] to 1.
There is a small performance cost (<0.5%) for setting this
bit.

SDEN is available at https://developer.arm.com/documentation/SDEN1707912/0900

Change-Id: I2d72666468b146714a0340ba114ccf0f5165b39c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
 2021-08-19 02:15:09 -07:00
Jimmy Brisson 5effe0beba Rename Cortex Hercules AE to Cortex 78 AE 
Change-Id: Ic0ca51a855660509264ff0d084c068e1421ad09a
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
 2020-10-05 15:14:11 -05:00