Commit Graph

10130 Commits

Author SHA1 Message Date
Sieu Mun Tang 108514ff71 fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD
'INTEL_SIP_SMC_MBOX_SEND_CMD' SMC runtime service will only return
mailbox status and the argument's length back to the caller

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Change-Id: I50d2ae74845794cab7bf0858e742b5a70e0ea868
2022-02-23 16:29:12 +08:00
Siew Chin Lim e93551bb3b fix(intel): always set doorbell to SDM after sending command
This patch fixes the mailbox stall issue when sending mailbox command
that is larger than mailbox command FIFO size.

Large mailbox command will be sent to SDM in multiple chunks. HPS will
set doorbell to SDM when command FIFO full (is_doorbell_triggered will
be set to 1) to notify SDM to read the command data from FIFO, so that
HPS can continue to send the next chunk of command data.

However, HPS will not set the doorbell to SDM at the end if the doorbell
have been set earlier due to FIFO full. This will cause SDM mailbox
service stall because it is still waiting for last chunk of command data.

This patch fixes the code to always set the doorbell to SDM at the end
to get rid of stall issue.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change-Id: Idbe62410a00d92a30c7aeaa26d53d79a910cac0a
2022-02-23 16:29:03 +08:00
Siew Chin Lim c9c070994c fix(intel): fix bit masking issue in intel_secure_reg_update
intel_secure_reg_update function should apply mask to the value before
write into register.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change-Id: I84bbd06e24b8666528b53030e8359743d438eb5b
2022-02-23 16:28:59 +08:00
Abdul Halim, Muhammad Hadi Asyrafi 12d71ac662 fix(intel): fix ddr address range checker
This patch fix address range checker to make sure that it does not
errors out on NULL address with size 0. Non-secure software will send
this NULL address if the SMC call doesn't need to pass any address buffer.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I7e492c562a311ba989570c4ed465f845333ec865
2022-02-23 16:28:56 +08:00
Sieu Mun Tang e564137dbd build(changelog): add new scope for Intel platform
Add new scope for Intel platform.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I1fa7f5e0e5567825615dd0275b204b82fe8c2337
2022-02-23 16:28:52 +08:00
Madhukar Pappireddy 8d9c1b3ca5 Merge changes from topic "st-format-signedness" into integration
* changes:
  feat(stm32mp1): enable format-signedness warning
  fix(stm32mp1): correct types in messages
  fix(st-pmic): correct verbose message
  fix(st-sdmmc2): correct cmd_idx type in messages
  fix(st-fmc): fix type in message
  fix(mtd): correct types in messages
  fix(usb): correct type in message
  fix(tzc400): correct message with filter
  fix(psci): correct parent_node type in messages
  fix(libc): correct some messages
  fix(fconf): correct image_id type in messages
  fix(bl2): correct messages with image_id
2022-02-17 00:35:52 +01:00
Olivier Deprez b9be997d7d Merge "feat(spm): add FFA_MSG_SEND2 forwarding in SPMD" into integration 2022-02-16 11:00:41 +01:00
Madhukar Pappireddy 22bbb34afa Merge "refactor(stm32mp1): move PIE flag to SP_min" into integration 2022-02-15 23:41:24 +01:00
Madhukar Pappireddy 24872370fa Merge changes from topic "ea/corstone1000" into integration
* changes:
  feat(corstone1000): identify bank to load fip
  fix(corstone1000): change base address of FIP in the flash
  feat(corstone1000): implement platform specific psci reset
  feat(corstone1000): made changes to accommodate 3MB for optee
  build(corstone1000): rename diphda to corstone1000
2022-02-15 19:02:01 +01:00
Yann Gautier cff26c1916 feat(stm32mp1): enable format-signedness warning
Add the flag -Wformat-signedness to TF_CFLAGS for STM32MP1.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I6af18778902b0a4dae1c08735d2d070ef3d137ce
2022-02-15 18:09:51 +01:00
Yann Gautier 43bbdca04f fix(stm32mp1): correct types in messages
Avoid warnings when -Wformat-signedness is enabled.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I0ca41cb96826b4f7f9bcf77909fad110325c1e91
2022-02-15 18:09:51 +01:00
Yann Gautier 47065ffe44 fix(st-pmic): correct verbose message
Replace %d with %u in log, to avoid warning when
-Wformat-signedness is enabled.

Change-Id: Ied5823520181f225ae09bd164e2e52e9a7692c60
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-15 18:09:51 +01:00
Yann Gautier bc1c98a8c7 fix(st-sdmmc2): correct cmd_idx type in messages
As cmd_idx is unsigned, we have to use %u and not %d.
This avoids warning when -Wformat-signedness is enabled.

Change-Id: I6954a8c939f3fb47dbb2c6db56a1909565af078b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-15 18:09:51 +01:00
Yann Gautier afcdc9d8d7 fix(st-fmc): fix type in message
As page is unsigned, we should use %u and not %d.
Find with -Wformat-signedness.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I7205971ee5e83163e4fe47d33bb9e90832b59ae0
2022-02-15 18:09:51 +01:00
Yann Gautier 6e86b46249 fix(mtd): correct types in messages
Some messages don't use the correct types, update them.
This avoids warning when -Wformat-signedness is enabled.

Change-Id: Ie5384a7d139c48a623e1617c93d15fecc8a36061
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-15 18:09:51 +01:00
Yann Gautier bd9cd63ba0 fix(usb): correct type in message
pdev->request.bm_request is unsigned, use %u.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Idaadb8440d0b56bcfa02abd7c94a4ab59f5e15ee
2022-02-15 18:09:51 +01:00
Yann Gautier bdc88d2154 fix(tzc400): correct message with filter
As filter is unsigned, we have to use %u and not %d.
This avoids warning when -Wformat-signedness is enabled.

Change-Id: I9fc9f15774dc974edfa3db65f5aecd1e70bc146b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-15 18:09:51 +01:00
Yann Gautier b9338eee7f fix(psci): correct parent_node type in messages
As parent_node is unsigned, we have to use %u and not %d.
This avoids warning when -Wformat-signedness is enabled.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I5ab7acb33227d720b2c8a4ec013435442b219a44
2022-02-15 18:09:51 +01:00
Yann Gautier a211fde940 fix(libc): correct some messages
Replace %d with %u in logs, to avoid warning when
-Wformat-signedness is enabled.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Id058f6fb0fd25ce5f83b1be41082403fcb205841
2022-02-15 18:09:51 +01:00
Yann Gautier cec2fb2b1a fix(fconf): correct image_id type in messages
As image_id is unsigned, we have to use %u and not %d.
This avoids warning when -Wformat-signedness is enabled.

Change-Id: I292e1639847e69ba79265fc32871c0ad7eebc94e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-15 18:09:51 +01:00
Yann Gautier e4c77db9c8 fix(bl2): correct messages with image_id
As image_id is unsigned, we have to use %u and not %d.
This avoids warning when -Wformat-signedness is enabled.

Change-Id: I3f868f3d14c9f19349f0daa8a754179f887339c0
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-15 18:09:51 +01:00
Satish Kumar cf89fd57ed feat(corstone1000): identify bank to load fip
Secure enclave decides the boot bank based on the firmware update
state of the system and updates the boot bank information at a given
location in the flash. In this commit, bl2 reads the given flash
location to indentify the bank from which it should load fip from.

Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Change-Id: I7f0f4ffc97189c9deb99db44afcd966082ffbf21
2022-02-15 13:26:35 +00:00
Satish Kumar 1559450132 fix(corstone1000): change base address of FIP in the flash
More space in the flash is reserved up front for metadata
parser and UEFI variables. That requires change in the flash
base address of where images are present.

Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Change-Id: Ieaabe09374d707de18d36505c69b6c9a8c2ec2e9
2022-02-15 09:12:32 +00:00
Emekcan Aras a599c80d06 feat(corstone1000): implement platform specific psci reset
This change implements platform specific psci reset
for the corstone1000.

Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Change-Id: I25f77234506416c3376ff4a028f6ea40ebe68437
2022-02-15 09:11:59 +00:00
Federico Recanati c2eba07c47 feat(spm): add FFA_MSG_SEND2 forwarding in SPMD
Add FF-A v1.1 indirect messaging ABI FFA_MSG_SEND2 to SPMD to allow
message forwarding across normal/secure worlds.

Change-Id: I074fbd2e4d13893925f987cee271d49da3aaf64b
Signed-off-by: Federico Recanati <federico.recanati@arm.com>
2022-02-14 13:34:49 +01:00
Arpita S.K 854d1c103a feat(corstone1000): made changes to accommodate 3MB for optee
These changes are required to accommodate 3MB for OP-TEE and this
is required for SP's part of optee
Added size macro's for better readability of the code
Moved uboot execution memory from CVM to DDR

Change-Id: I16657c6e336fe7c0fffdee1617d10af8a2c76732
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
2022-02-14 10:34:46 +00:00
Vishnu Banavath 0260eb0d15 build(corstone1000): rename diphda to corstone1000
diphda platform is now being renamed to corstone1000.
These changes are to replace all the instances and traces
of diphda  corstone1000.

Change-Id: I330f3a112d232b99b4721b6bf0236253b068dbba
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
2022-02-14 10:32:16 +00:00
Joanna Farley b22f18e365 Merge changes from topic "snprintf-fix" into integration
* changes:
  fix(libc): snprintf: include stdint.h
  fix(libc): limit snprintf radix value
  fix(libc): fix snprintf corner cases
2022-02-11 18:51:25 +01:00
Manish Pandey 2ba3085b8c Merge "refactor(measured-boot): cleanup Event Log makefile" into integration 2022-02-11 17:57:26 +01:00
Yann Gautier 56e8952fc0 refactor(stm32mp1): move PIE flag to SP_min
The PIE compilation is used only for BL32, move the ENABLE_PIE to
sp_min-stm32mp1.mk file. Override PIE flags, as sp_min.mk file is
included after the flags are set in Makefile.
The BL2_IN_XIP_MEM was added for a feature not yet upstreamed.
It is then removed from platform.mk file.

Change-Id: If055e51e0f160f99cd4e4cf68ca718d4d693119c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
2022-02-11 17:43:31 +01:00
Madhukar Pappireddy 2165f97e88 Merge "feat(common): add SZ_* macros" into integration 2022-02-11 17:19:55 +01:00
Madhukar Pappireddy 92bebd836a Merge "refactor(stm32mp1): update tamp_bkpr return type" into integration 2022-02-11 17:05:23 +01:00
Manish Pandey f22182f8e4 Merge "docs(contribution-guidelines): updated the build configuration section" into integration 2022-02-11 15:37:04 +01:00
Jayanth Dodderi Chidanand a092825d1f docs(contribution-guidelines): updated the build configuration section
Added a couple of sub-sections (Coverity Scan and Test Configuration)
under "Add build configuration" to update the patch owners on the
sections they need to be aware of while introducing new source files.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: I84adb182f9633863aac864df43578249c2269c1e
2022-02-11 12:16:20 +00:00
Nicolas Toromanoff c870188d27 refactor(stm32mp1): update tamp_bkpr return type
tamp_bkpr() returns a register address. So use uintptr_t instead of
uin32_t.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Change-Id: I5eddfa525465313dadfec18d128248a968ba74e2
2022-02-11 11:05:30 +01:00
Andre Przywara 410c925ab3 fix(libc): snprintf: include stdint.h
The snprintf code uses the uintptr_t type, which is defined in stdint.h.
We do not include this header explicitly, but get the definition
indirectly through some other header doing so.

However this breaks when snprintf is compiled in isolation (for instance
for unit-testing), so let's add this #include to make things right.

Change-Id: I1299767ee482f5cf1af30c4df2e8f7e596969b41
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-10 16:33:32 +00:00
Andre Przywara b30dd4030d fix(libc): limit snprintf radix value
In our unsigned_num_print() function we first print the integer into a
local buffer, then put this through alignment and padding and output the
result. For this we use a local buffer, sized by the maximum possible
length of the largest possible number.

However this assumes that the radix is not smaller than 10, which is
indeed the smallest value we pass into this static function at the
moment. To prevent accidents in the future, should we add support for
other radices, add an assert to enforce our assumption.

Unfortunately this cannot be a static assert (CASSERT), since the
compiler is not smart enough to see that the argument is always coming
from a literal.

Change-Id: Ic204462600d9f4c281d899cf9f2c698a0a33a874
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-10 16:33:32 +00:00
Madhukar Pappireddy cbadfe6942 Merge "feat(spe): add support for FEAT_SPEv1p2" into integration 2022-02-10 16:11:10 +01:00
Manish V Badarkhe f20eb893a0 feat(spe): add support for FEAT_SPEv1p2
Allow access to PMSNEVFR_EL1 register at NS-EL1 or NS-EL2 when
FEAT_SPEv1p2 is implemented.

Change-Id: I44b1de93526dbe9c11fd061d876371a6c0e6fa9c
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-02-10 09:30:13 +00:00
Manish Pandey 94ac06ed5c Merge changes from topic "db/exception_pstate" into integration
* changes:
  test(el3-runtime): dit is retained on world switch
  fix(el3-runtime): set unset pstate bits to default
  refactor(el3-runtime): add prepare_el3_entry func
2022-02-09 15:05:47 +01:00
Yann Gautier 1af59c4570 feat(common): add SZ_* macros
Add the SZ_* macros from 32 to 2G.
This allows removing some defines in raw NAND driver
and STM32MP1 boot device selection code.

Change-Id: I3c4d4959b0f43e785eeb37a43d03b2906b7fcfbc
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
2022-02-08 10:49:36 +01:00
Andre Przywara c1f5a0925d fix(libc): fix snprintf corner cases
The number formatting routine in snprintf was trying to be clever with
the buffer handling, but tripped over its own feet: snprintf() users
expect output to be emitted, even if not everything fits into the
buffer. The current code gives up completely when the buffer is too
small.

Fix those issues and simplify the code on the way, by consequently using
the CHECK_AND_PUT_CHAR() macro, which both checks for the buffer size
correctly, but also keeps track of the number of should-be-printed
characters for the return value.

Change-Id: Ifd2b03b9a73f9279abed53081a2d88720ecbdbc1
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-07 16:14:21 +00:00
Madhukar Pappireddy acd0e9bf64 Merge "fix(ufs): don't zero out the write buffer" into integration 2022-02-07 16:41:38 +01:00
Madhukar Pappireddy 0e1c3f8cb7 Merge "feat(rdn2): add board support for rdn2cfg2 variant" into integration 2022-02-07 16:24:39 +01:00
Madhukar Pappireddy 0e38ff2ac6 Merge "feat(st): update the security based on new compatible" into integration 2022-02-04 16:57:15 +01:00
Madhukar Pappireddy bfc231c164 Merge "feat(st): add early console in BL2" into integration 2022-02-04 16:56:32 +01:00
Aditya Angadi efeb43808d feat(rdn2): add board support for rdn2cfg2 variant
Add board support for variant 2 of RD-N2 platform which is a four chip
variant with 4 cores on each chip. The "CSS_SGI_PLATFORM_VARIANT" value
is 2 for multi-chip variant. The "CSS_SGI_CHIP_COUNT_MACRO" can be in
the range [1, 4] for multi-chip variant.

Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
Change-Id: I6412106e80e2f17704c796226c2ee9fe808705ba
2022-02-04 16:31:52 +05:30
Jorge Troncoso cd3ea90b20 fix(ufs): don't zero out the write buffer
Previously ufs_write_blocks was memsetting the write buffer before
calling ufs_prepare_cmd, causing zeros to be written to UFS. This change
deletes the memset call so the original buffer contents get written to
UFS.

Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: I3299f11b30e6d7d409408ce11a6759c88607ee18
2022-02-03 15:52:59 -08:00
Manish Pandey e0a6a512b5 Merge changes from topic "msm8916" into integration
* changes:
  feat(msm8916): allow booting secondary CPU cores
  feat(msm8916): setup hardware for non-secure world
  feat(gic): allow overriding GICD_PIDR2_GICV2 address
  feat(msm8916): initial platform port
  docs(msm8916): new port for Qualcomm Snapdragon 410
2022-02-03 22:59:34 +01:00
Stephan Gerhold a758c0b65c feat(msm8916): allow booting secondary CPU cores
Add support for the PSCI CPU_ON call to allow booting secondary CPU
cores. On cold boot they need to be booted with a special register
sequence. Also, the "boot remapper" needs to be configured to point to
the BL31_BASE, so the CPUs actually start executing BL31 after reset.

Change-Id: I406c508070ccb046bfdefd51554f12e1db671fd4
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2022-02-03 15:19:26 +01:00