Commit Graph

12 Commits

Author SHA1 Message Date
Masahisa Kojima 206fa996b8 qemu/qemu_sbsa: fix memory type of secure NOR flash
This commit fixes the wrong memory type, secure NOR flash
shall be mapped as MT_DEVICE.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Change-Id: I9c9ed51675d84ded675bb56b2e4ec7a08184c602
2021-03-01 15:52:10 +09:00
Masahisa Kojima cf952b0fb5 qemu/qemu_sbsa: spm_mm supports 512 cores
sbsa-ref in QEMU may create up to 512 cores.
This commit prepares the MP information to support 512 cores.
The number of xlat tables for spm_mm is also increased.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Change-Id: I2788eaf6d14e188e9b5d1102d359b2899e02df7c
2021-03-01 14:31:42 +09:00
Graeme Gregory 2fb5ed4737 qemu/qemu_sbsa: add support for sbsa-ref Embedded Controller
This allows PSCI in TF-A to signal platform power states to QEMU
via a controller in secure space.

This required a sbsa-ref specific version of PSCI functions for the
platform. Also adjusted the MMU range to also include the new EC.

Add a new MMU region for the embedded controller and increase the
size of xlat tables by one for the new region.

Signed-off-by: Graeme Gregory <graeme@nuviainc.com>
Change-Id: Iece8a88947f11e82ab8988e460a8a66ad175a5ee
2021-01-19 18:40:45 +00:00
Graeme Gregory 5565ede44a qemu/qemu_sbsa: topology is different from qemu so add handling
sbsa-ref in QEMU creates clusers of 8 cores, it may create up to 512
cores in upto 64 clusters. Implement a qemu_sbsa specific topology file
and increase the BL31_SIZE to accommodate the bigger table sizes. Change
platform_def.h for new topology. Correct PLATFORM_CPU_PER_CLUSTER_SHIFT so
plat_helpers.S calculates correct result.

Signed-off-by: Graeme Gregory <graeme@nuviainc.com>
Change-Id: Idc5d70394c0956b759ad2c86f9fda8f293f2cfa7
2021-01-19 18:40:05 +00:00
Graeme Gregory 3063177e39 qemu/aarch64/plat_helpers.S : calculate the position shift
Rather than re-create this file in multiple qemu variants instead
caclulate the shift needed to convert MPIDR to position.

Add a new PLATFORM_CPU_PER_CLUSTER_SHIFT define in platform_def.h
for both qemu and qemu_sbsa to enable this calculation.

Signed-off-by: Graeme Gregory <graeme@nuviainc.com>
Change-Id: I0e3a86354aa716d95150a3a34b15287cd70c8fd2
2021-01-19 18:35:55 +00:00
Masahisa Kojima 74c87a4bcd qemu/qemu_sbsa: enable secure variable storage
This implements support for UEFI secure variable storage
using standalone MM framework on qemu_sbsa platform.

Non-secure shared memory between UEFI and standalone MM
is allocated at the top of DRAM.
DRAM size of qemu_sbsa varies depends on the QEMU parameter,
so the non-secure shared memory is allocated by trusted firmware
and passed the base address and size to UEFI through device tree
"/reserved-memory" node.

Change-Id: I367191f408eb9850b7ec7761ee346b014c539767
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2021-01-13 10:23:04 +00:00
Masato Fukumori 54b590ec0d qemu/qemu_sbsa: increase SHARED_RAM_SIZE
Increase SHARED_RAM_SIZE in sbsa_qemu platform from 4KB to 8KB.

sbsa_qemu uses SHARED_RAM for mail box and hold state of each cpus. If
qemu is configured with 512 cpus, region size used by qemu is greater
than 4KB.

Signed-off-by: Masato Fukumori <masato.fukumori@linaro.org>
Change-Id: I639e44e89335249d385cdc339350f509e9bd5e36
2020-12-01 14:01:24 +00:00
Masahisa Kojima 6a2426a94f qemu/qemu_sbsa: enable SPM support
Enable the spm_mm framework for the qemu_sbsa platform.
Memory layout required for spm_mm is created in secure SRAM.

Co-developed-by: Fu Wei <fu.wei@linaro.org>
Signed-off-by: Fu Wei <fu.wei@linaro.org>
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Change-Id: I104a623e8bc1e44d035b95f014a13b3f8b33a62a
2020-08-18 22:45:35 +00:00
Masahisa Kojima d7f5be8ec2 qemu/qemu_sbsa: increase size to handle fdt
64KB was not enouth to handle fdt, bl2 shows
following error message.

"ERROR:   Invalid Device Tree at 0x10000000000: error -3"

This patch increases the size to 1MB to address above error.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Change-Id: I0726a0cea95087175451da0dba7410acd27df808
2020-06-03 15:19:15 +00:00
Deepika Bhavnani 645ac02dd6 qemu: Unify Platform specific defines for PSCI module
PLATFORM_CORE_COUNT - Unsigned int
PLATFORM_CLUSTER_COUNT - Unsigned int
PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int
PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int

Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: I460b35f5a4ec47b13d4e811bb20881ce314e9259
2020-01-24 13:15:33 +00:00
Radoslaw Biernacki fa405e3b82 qemu/qemu_sbsa: Adding memory mapping for both FLASH0/FLASH1
This patch adds mapping for secure FLASH0 for qemu/virt and
qemu/qemu_sbsa platforms. This change is targeted for sbsa but since both
platforms share common code, changes in common defines was necessary.

For qemu_sbsa, this patch adds necessary mapping in order to boot without
semi-hosting from secure FLASH0. EFI need to stay in FLASH1 (share it with
variables) since it need to "run in place" in non secure domain. Changes
for this are under RFC at edk2-platforms mailing list:
https://patches.linaro.org/patch/171327/
(edk2-platforms/Platform/Qemu/SbsaQemu/SbsaQemu.dsc).

In docs qemu/virt is described as using semi-hosting, therefore this change
should be orthogonal to existing assumptions while giving possibility to
store both bl1 and fip in FLASH0 at some point (additional changes required
for that).

Signed-off-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org>
Change-Id: I782bc3637c91c01eaee680b3c5c408e24b4b6e28
2019-10-01 17:24:06 +02:00
Radoslaw Biernacki 558a6f444d qemu/qemu_sbsa: Adding Qemu SBSA platform
This patch introduces Qemu SBSA platform.
Both platform specific files where copied from qemu/qemu with changes for
DRAM base above 32bit and removal of ARMv7 conditional defines/code.
Documentation is aligned to rest of SBSA patches along the series and
planed changes in edk2-platform repo.

Fixes ARM-software/tf-issues#602

Signed-off-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org>
Change-Id: I8ebc34eedb2268365e479ef05654b2df1b99128c
2019-10-01 17:23:56 +02:00