Commit Graph

10753 Commits

Author SHA1 Message Date
J-Alves 573ac37373 docs(spm): update ff-a boot protocol documentation
Updated following sections to document implementation of the FF-A boot
information protocol:
- Describing secure partitions.
- Secure Partition Packages.
- Passing boot data to the SP.
Also updated description of the manifest field 'gp-register-num'.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I5c856437b60cdf05566dd636a01207c9b9f42e61
2022-05-25 16:58:28 +01:00
J-Alves 77b73416d3 docs(maintainers): add code owner to sptool
Add Joao Alves as code owner to the sptool.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I9e44e322ba1cce62308bf16c4a6253f7b0117fe0
2022-05-24 16:27:21 +01:00
Bipin Ravi 453abc80b2 Merge changes from topic "sb/threat-model" into integration
* changes:
  docs(threat-model): make measured boot out of scope
  docs(threat-model): revamp threat #9
2022-05-19 21:33:32 +02:00
Madhukar Pappireddy 4cafcc30ed Merge "fix(bl1): invalidate SP in data cache during secure SMC" into integration 2022-05-19 21:11:55 +02:00
Olivier Deprez 70313d363b Merge changes from topic "ffa_el3_spmc" into integration
* changes:
  feat(fvp): add plat hook for memory transactions
  feat(spmc): enable handling of the NS bit
  feat(spmc): add support for v1.1 FF-A memory data structures
  feat(spmc/mem): prevent duplicated sharing of memory regions
  feat(spmc/mem): support multiple endpoints in memory transactions
  feat(spmc): add support for v1.1 FF-A boot protocol
  feat(plat/fvp): introduce accessor function to obtain datastore
  feat(spmc/mem): add FF-A memory management code
2022-05-19 18:33:03 +02:00
Olivier Deprez 9c5d483b91 Merge "refactor(context mgmt): refactor initialization of EL1 context registers" into integration 2022-05-19 16:42:58 +02:00
Madhukar Pappireddy be1d3a1a85 Merge changes from topic "gpt-crc" into integration
* changes:
  feat(partition): verify crc while loading gpt header
  build(hikey): platform changes for verifying gpt header crc
  build(agilex): platform changes for verifying gpt header crc
  build(stratix10): platform changes for verifying gpt header crc
  build(stm32mp1): platform changes for verifying gpt header crc
2022-05-19 16:04:39 +02:00
Marc Bonnici a8be4cd057 feat(fvp): add plat hook for memory transactions
Add call to platform hooks upon successful transmission of a
memory transaction request and as part of a memory reclaim request.
This allows for platform specific functionality to be performed
accordingly.

Note the hooks must be placed in the initial share request and final
reclaim to prevent order dependencies with operations that may take
place in the normal world without visibility of the SPMC.

Add a dummy implementation to the FVP platform.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I0c7441a9fdf953c4db0651512e5e2cdbc6656c79
2022-05-19 15:02:47 +01:00
Marc Bonnici 0560b53e71 feat(spmc): enable handling of the NS bit
In FF-A v1.1 the NS bit is used by the SPMC to specify the
security state of a memory region retrieved by a SP.

Enable the SPMC to set the bit for v1.1 callers or v1.0
callers that explicitly request the usage via FFA_FEATURES.

In this implementation the sender of the memory region must
reside in the normal world and the SPMC does not support
changing the security state of memory regions therefore
always set the NS bit if required by the caller.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I215756b28e2382082933ba1dcc7584e7faf4b36b
2022-05-19 15:02:47 +01:00
Marc Bonnici 7e804f9695 feat(spmc): add support for v1.1 FF-A memory data structures
Add support for the FF-A v1.1 data structures to the EL3 SPMC
and enable the ability to convert between v1.0 and the v1.1
forwards compatible data structures.

The SPMC now uses the v1.1 data structures internally and will
convert descriptors as required depending on the FF-A version
supported by the calling partition.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ic14a95ea2e49c989aecf19b927a6b21ac50f863e
2022-05-19 15:02:46 +01:00
Marc Bonnici fef85e1e53 feat(spmc/mem): prevent duplicated sharing of memory regions
Allow the SPMC to reject incoming memory sharing/lending requests
that contain memory regions which overlap with an existing
request.

To enable this functionality the SPMC compares each requested
memory region to those in ongoing memory transactions and rejects
the request if the ranges overlap.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I7588846f272ec2add2a341d9f24836c73a046e2f
2022-05-19 15:02:30 +01:00
Marc Bonnici f0244e5dd1 feat(spmc/mem): support multiple endpoints in memory transactions
Enable FFA_MEM_LEND and FFA_MEM_SHARE transactions to support multiple
borrowers and add the appropriate validation. Since we currently
only support a single S-EL1 partition, this functionality is to
support the use case where a VM shares or lends memory to one or
more VMs in the normal world as part of the same transaction to
the SP.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ia12c4357e9d015cb5f9b38e518b7a25b1ea2e30e
2022-05-19 15:02:26 +01:00
Manish Pandey 0a9a0edf98 Merge changes from topic "mb/drtm-work-phase-1" into integration
* changes:
  build(changelog): add new scope for Arm SMMU driver
  feat(smmu): add SMMU abort transaction function
  docs(build): add build option for DRTM support
  build(drtm): add DRTM support build option
2022-05-19 15:15:49 +02:00
Sandrine Bailleux 687cb6bdd3 Merge changes from topic "sb/threat-model" into integration
* changes:
  docs(threat-model): remove some redundant text in threat #08
  docs(threat-model): make experimental features out of scope
  docs(threat-model): cosmetic changes
2022-05-19 13:09:00 +02:00
Sandrine Bailleux 2af8107d40 Merge "build(changelog): add new scope for the threat model" into integration 2022-05-19 12:58:10 +02:00
Achin Gupta 2e21921502 feat(spmc): add support for v1.1 FF-A boot protocol
A partition can request the use of the FF-A boot protocol via
an entry in its manifest along with the register (0-3)
that should be populated with a pointer to a data structure
containing boot related information. Currently the boot
information consists of an allocated memory region
containing the SP's manifest, allowing it to map and parse
any extra information as required.

This implementation only supports the v1.1 data structures
and will return an error if a v1.0 client requests the usage
of the protocol.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I67692553a90a7e7d94c64fe275edd247b512efca
2022-05-19 10:57:37 +01:00
Marc Bonnici 6a0788bc0e feat(plat/fvp): introduce accessor function to obtain datastore
In order to provide the EL3 SPMC a sufficient datastore to
record memory descriptors, a accessor function is used.
This allows for the backing memory to be allocated in a
platform defined manner, to accommodate memory constraints
and desired use cases.

Provide an implementation for the Arm FVP platform to
use a default value of 512KB memory allocated in the
TZC RAM section.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I92bc55ba6e04bdad429eb52f0d2960ceda682804
2022-05-19 10:57:37 +01:00
Marc Bonnici e0b1a6d59e feat(spmc/mem): add FF-A memory management code
Originally taken from the downstream Trusty SPD [1]
implementation and modified to integrate with
the EL3 SPMC internals.

Add support to the EL3 SPMC for a subset of the FF-A
memory management ABIs:
- FFA_MEM_SHARE
- FFA_MEM_LEND
- FFA_MEM_RETRIEVE_REQ
- FFA_MEM_RETRIEVE_RESP
- FFA_MEM_RELINQUISH
- FFA_MEM_RECLAIM
- FFA_MEM_FRAG_RX
- FFA_MEM_FRAG_TX

This implementation relies on a datastore allocated in
platform specific code in order to store memory descriptors
about ongoing memory transactions. This mechanism
will be implemented in the following commit.

[1] https://android.googlesource.com/trusty/external/trusted-firmware-a/+/refs/heads/master/services/spd/trusty/

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ib042f73c8a6e0f0aed00f6762be175cb9dedc042
2022-05-19 10:57:30 +01:00
Sandrine Bailleux d08c496699 docs(threat-model): make measured boot out of scope
Add an explicit note that measured boot is out of scope of the threat
model. For example, we have no threat related to the secure
management of measurements, nor do we list its security benefits
(e.g. in terms of repudiation).

This might be a future improvement to the threat model but for now
just acknowledge it is not considered.

Change-Id: I2fb799a2ef0951aa681a755a948bd2b67415d156
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-05-19 11:31:39 +02:00
Manish V Badarkhe 0de3edac37 build(changelog): add new scope for Arm SMMU driver
Added new scope for Arm SMMU driver.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: I62f5ed36657a071d125cdddacbff9fb23d2bc8e0
2022-05-18 22:22:41 +01:00
Lucian Paul-Trifu 6c5c532051 feat(smmu): add SMMU abort transaction function
Created a function to abort all pending NS DMA transactions to
engage complete DMA protection. This call will be used by the
subsequent DRTM implementation changes.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Change-Id: I94992b54c570327d6746295073822a9c0ebdc85d
2022-05-18 22:22:41 +01:00
Manish V Badarkhe 859eabd4c4 docs(build): add build option for DRTM support
Documented the build option for DRTM support.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Change-Id: Ic1543ee5f1d0046d5062d9744bd1a136d940b687
2022-05-18 22:22:41 +01:00
Manish V Badarkhe 00e28874df build(drtm): add DRTM support build option
Added DRTM support build option in the makefiles.
This build option will be used by the DRTM implementation
in the subsequent patches.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Change-Id: I15366f86b3ebd6ab2ebcb192753015d547cdddee
2022-05-18 22:22:41 +01:00
Madhukar Pappireddy fd36b00f8a Merge changes from topic "xlnx_zynqmp_misra_fix" into integration
* changes:
  fix(zynqmp): resolve misra 8.3 warnings
  fix(zynqmp): resolve misra R8.4 warnings
2022-05-18 22:10:31 +02:00
Zelalem Aweke b515f5414b refactor(context mgmt): refactor initialization of EL1 context registers
When SPMC is present at S-EL2, EL1 context registers don't need to be
initialized for Secure state. This patch makes sure that EL1 context
registers are initialized only for Non-secure state, and when SPMC is
not present at S-EL2

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: I4a60b258c31ce5f6472a243e2687159cc495259b
2022-05-18 11:11:33 -05:00
Sandrine Bailleux 0482fdf8ca Merge "build(deps): bump ansi-regex from 3.0.0 to 3.0.1" into integration 2022-05-18 15:46:22 +02:00
Rohit Ner a283d19f82 feat(partition): verify crc while loading gpt header
This change makes use of 32-bit crc for calculating gpt header crc
and compares it with the given value.

Signed-off-by: Rohit Ner <rohitner@google.com>
Change-Id: I49bca7aab2c3884881c4b7d90d31786a895290e6
2022-05-18 06:25:47 -07:00
Rohit Ner e682c723cd build(hikey): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of
platforms using partition driver.

Signed-off-by: Rohit Ner <rohitner@google.com>
Change-Id: I0d524760bf52e1d9b4a103f556231f20146bd78e
2022-05-18 06:16:37 -07:00
Rohit Ner 7a756a5717 build(agilex): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of
platforms using partition driver.

Signed-off-by: Rohit Ner <rohitner@google.com>
Change-Id: I1290972c7d2626262d4b6d68b99bb8f2c4b6744c
2022-05-18 06:15:45 -07:00
Rohit Ner 4f53bd29f9 build(stratix10): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of
platforms using partition driver.

Signed-off-by: Rohit Ner <rohitner@google.com>
Change-Id: Ie26d9e5943453ce54ee8c72c6e44170577e3afc0
2022-05-18 06:12:46 -07:00
Rohit Ner 7da7f1f0b0 build(stm32mp1): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of
platforms using partition driver.

Signed-off-by: Rohit Ner <rohitner@google.com>
Change-Id: I66f6daaa0deac984b0aa5f2a182385410189ba8a
2022-05-18 06:11:17 -07:00
dependabot[bot] a48bd78b93 build(deps): bump ansi-regex from 3.0.0 to 3.0.1
Bumps [ansi-regex](https://github.com/chalk/ansi-regex) from 3.0.0 to 3.0.1.
- [Release notes](https://github.com/chalk/ansi-regex/releases)
- [Commits](https://github.com/chalk/ansi-regex/compare/v3.0.0...v3.0.1)

---
updated-dependencies:
- dependency-name: ansi-regex
  dependency-type: indirect
...

Change-Id: Ie00f6fa342338bcd5c7cd32eec6f9d225738ad9b
Signed-off-by: dependabot[bot] <support@github.com>
Signed-off-by: Chris Kay <chris.kay@arm.com>
2022-05-18 11:48:27 +01:00
Harrison Mutai f1cbbd6332 fix(bl1): invalidate SP in data cache during secure SMC
Invalidate the SP holding `smc_ctx_t` prior to enabling the data cache
when handling SMCs from the secure world. Enabling the data cache
without doing so results in dirty data either being evicted into main
memory, or being used directly from bl1. This corrupted data causes
system failure as the SMC handler attempts to use it.

Change-Id: I5b7225a6fdd1fcfe34ee054ca46dffea06b84b7d
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2022-05-18 09:32:08 +01:00
Sandrine Bailleux 48e73457a6 Merge changes from topic "sb/update-maintainers" into integration
* changes:
  docs(maintainers): remove John Powell from code owners
  docs(maintainers): remove Jimmy Brisson from code owners
2022-05-18 07:50:42 +02:00
Madhukar Pappireddy d8701fa5bd Merge "fix(stm32mp1): include assert.h to fix build failure" into integration 2022-05-17 18:42:32 +02:00
Olivier Deprez ee211d0864 Merge "docs: update supported FVP models documentation" into integration 2022-05-17 17:40:45 +02:00
Manish V Badarkhe 570c71b20a fix(stm32mp1): include assert.h to fix build failure
stm32mp1 platform build failed with the error [1] in the coverity, to
fix it included assert.h file.

Including bl32/sp_min/sp_min.mk
plat/st/stm32mp1/plat_image_load.c: In function
'plat_get_bl_image_load_info':
plat/st/stm32mp1/plat_image_load.c:30:2: error: implicit declaration of
function 'assert' [-Werror=implicit-function-declaration]
   30 |  assert(bl33 != NULL);
      |  ^~~~~~
plat/st/stm32mp1/plat_image_load.c:9:1: note: 'assert' is defined in
header '<assert.h>'; did you forget to '#include <assert.h>'?
    8 | #include <plat/common/platform.h>
  +++ |+#include <assert.h>
    9 |
cc1: all warnings being treated as errors

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: I486bd695298798c05008158545668020babb3eca
2022-05-17 16:34:02 +01:00
Madhukar Pappireddy a12a2c461b Merge "fix(stm32mp1-fdts): correct memory mapping for STM32MP13" into integration 2022-05-17 17:15:11 +02:00
Manish Pandey d8ba3278c8 Merge "refactor(security): upgrade tools to OpenSSL 3.0" into integration 2022-05-17 16:48:07 +02:00
Maksims Svecovs 173c3afcb4 docs: update supported FVP models documentation
Update supported models list according to changes for v2.7 release in
ci/tf-a-ci-scripts repository:
* general FVP model update: 5c54251
* CSS model update: 3bd12fb

Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>
Change-Id: I38c2ef2991b23873821c7e34ad2900b9ad023c4b
2022-05-17 15:27:22 +01:00
Yann Gautier 99605fb116 fix(stm32mp1-fdts): correct memory mapping for STM32MP13
On STM32MP13, OP-TEE will be loaded at the beginning of the secure
memory, and will be responsible for its shared memory.
The memory allocated to OP-TEE is then 32MB, and the shared memory
does no more appear in the STM32MP13 fw-config DT file.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I4e9238ddb4d82079b9ddf8fc8f6916b5b989d263
2022-05-17 16:21:25 +02:00
Manish Pandey 4c4315e874 Merge "fix(arm): remove reclamation of functions starting with "init"" into integration 2022-05-17 11:11:16 +02:00
Sandrine Bailleux 652df56626 docs(maintainers): remove John Powell from code owners
John Powell is no longer part of the TF-A core team at Arm.

Change-Id: Iaa91474cb2c5c334b9ae6f2376724fad2677e285
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-05-17 10:34:15 +02:00
Sandrine Bailleux 9293278c4b docs(maintainers): remove Jimmy Brisson from code owners
Jimmy Brisson is no longer part of the TF-A core team at Arm.

Change-Id: I2966c513a0c2cda438a05dedd42149d16190cbf6
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-05-17 10:26:55 +02:00
Sandrine Bailleux 1b7c82cafe docs(threat-model): remove some redundant text in threat #08
The threat description was repeating the threat title.

Change-Id: I67de2c0aab6e86bf33eb91e7562e075fcb76259b
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-05-17 10:01:11 +02:00
Sandrine Bailleux 50075fdcfb build(changelog): add new scope for the threat model
Change-Id: I884f31f7f4b5515c420839ff37d401faa69f5fff
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-05-17 10:01:11 +02:00
Sandrine Bailleux 3d6cc21066 docs(threat-model): revamp threat #9
Reword the description of threat #9 to make it more future-proof for
Arm CCA. By avoiding specific references to secure or non-secure
contexts, in favour of "worlds" and "security contexts", we make the
description equally applicable to 2-world and 4-world architectures.

Note that there are other threats that would benefit from such a
similar revamp but this is out of scope of this patch.

Also list malicious secure world code as a potential threat
agent. This seems to be an oversight in the first version of the
threat model (i.e. this change is not related to Arm CCA).

Change-Id: Id8c8424b0a801104c4f3dc70e344ee702d2b259a
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-05-17 10:01:11 +02:00
Sandrine Bailleux 4365b30ccf docs(threat-model): make experimental features out of scope
By nature, experimental features are incomplete pieces of work,
sometimes going under rapid change. Typically, the threat model
implications have not been fully considered yet.

Change-Id: Ice8d4273a789558e912f82cde592da4747b37fdf
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-05-17 10:01:11 +02:00
Sandrine Bailleux f10dd3e039 docs(threat-model): cosmetic changes
- Add empty lines after titles.

 - Reduce number of highlighting characters to fit title length.

 - Remove most ``monospaced text``.
   I think most of it looked weird in the rendered HTML version and
   it had no obvious meaning.

Change-Id: I5f746a3de035d8ac59eec0af491c187bfe86dad7
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-05-17 10:01:11 +02:00
Venkatesh Yadav Abbarapu 944e7ea94f fix(zynqmp): resolve misra 8.3 warnings
MISRA Violation: MISRA-C:2012 R.8.3
- Declaration uses a different parameter name than the one present in the
definition.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Id0521afd7383df13870710b7dd2894e788896e5e
2022-05-17 09:30:21 +05:30