Sumit Garg
5931fdac63
synquacer: Enable System level Generic timer
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Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:57 +05:30
Sumit Garg
b529799ff1
synquacer: Enable GICv3 support
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synquacer uses GICv3 compliant GIC500. So enable proper GICv3 driver
initialization.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:52 +05:30
Sumit Garg
0eb275c9a2
synquacer: Enable CCN driver support
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synquacer has CCN-512 interconnect. So enable proper CCN driver
initialization.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:48 +05:30
Sumit Garg
007a7a3358
synquacer: Implement topology functions
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These functions describe the layout of the cores and clusters in order
to support the PSCI framework.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:42 +05:30
Sumit Garg
67b400705f
synquacer: Enable PL011 UART Console
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Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:32 +05:30
Sumit Garg
85427debb1
synquacer: Add platform core management helpers
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Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:27 +05:30
Sumit Garg
c35d59a3d8
synquacer: Introduce basic platform support
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synquacer supports direct entry to BL31 without BL1 and BL2 as
SCP firmware does similar work. So this patch adds BL31 stub APIs.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:23 +05:30