Commit Graph

20 Commits

Author SHA1 Message Date
Olivier Deprez 00aa63d104 Merge changes from topic "tc0_tfa_v25" into integration
* changes:
  fix(tc0): remove ffa and optee device tree node
  fix(tc0): set cactus-tertiary vcpu count to 1
  fix(tc0): change UUID to string format
2021-06-30 12:06:13 +02:00
Madhukar Pappireddy b9f7fcc949 Merge changes I8d334231,Icd1ce8ec,Ic963c21c into integration
* changes:
  feat(tc0): add cpu capacity to provide scheduling information
  fix(tc0): remove "arm,psci" from psci node
  feat(tc0): update mhuv2 dts node to align with upstream driver
2021-06-29 00:53:11 +02:00
Usama Arif 309f5938e6
feat(tc0): add cpu capacity to provide scheduling information
Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I8d3342315a46c78b4c41582ec114f0364a194316
2021-06-28 20:32:50 +01:00
Usama Arif 814646b4cb
fix(tc0): remove "arm,psci" from psci node
"arm,psci" expects the FIDs for cpu-on, cpu-off and cpu-suspend, which
arent present in the device tree, so remove it from psci compatible.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: Icd1ce8ec7fd3f270925e4b3d5d0187088ffe4ba5
2021-06-28 20:32:29 +01:00
Usama Arif 63067ce87e
feat(tc0): update mhuv2 dts node to align with upstream driver
The MHUv2 driver has been merged upstream, and it has a different
dts format compared to what was previously used. This patch aligns
with the upstream driver.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: Ic963c21c1475d301c3a75686718e6e17841831c3
2021-06-28 20:32:29 +01:00
Arunachalam Ganapathy f1b44a9050 fix(tc0): remove ffa and optee device tree node
As FF-A driver probes OP-TEE SP dynamically, these entries are no more
required.

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: Ica091722a7fad13e02662b9b2cd11ca1879b9f80
2021-06-28 11:11:55 +01:00
Anders Dellien 4a840f27cd feat(tc0): add bootargs node
We will maintain the kernel command line here instead of in U-Boot.

Signed-off-by: Anders Dellien <anders.dellien@arm.com>
Change-Id: I6011306cbaf47717c061f542e180005281695516
2021-06-22 11:57:23 +01:00
Usama Arif a2f6294c98 feat(tc0): update Matterhorn ELP DVFS clock index
This allows the the Matterhorn ELP Arm core to operate at its
designated OPP.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I7ccef0cfd079d630c3cfe7874590bf42789a1dca
2021-04-30 10:39:08 +02:00
Usama Arif 69f2ace106 tc0: update GICR base address
The number of ITS have changed from 4 to 1, resulting
in GICR base address change.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I28101f0d1faf9f3c58591b642033c3fd49a275e7
2021-04-14 12:13:26 +01:00
Usama Arif a97c390b9f
fdts: use scmi_dvfs clock index 1 for cores 4-7
This allows Matterhorn cores to operate at their optimal OPPs.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I2e1b784da10154a1f1f65dd0e3a39213e7683116
2021-02-09 14:10:45 +00:00
Avinash Mehta e5da15e045 product/tc0: Enable Theodul DSU in TC platform
Increase the core count and add respective entries in DTS.
Add Klein assembly file to cpu sources for core initialization.
Add SCMI entries for cores.

Signed-off-by: Avinash Mehta <avinash.mehta@arm.com>
Change-Id: I14dc1d87df6dcc8d560ade833ce1f92507054747
2021-02-03 10:10:58 +00:00
Nikos Nikoleris fcb0ea19af fdts: Fix stdout-path in various platforms
The value of stdout-path is a string and as a result, we can't use a
label as a reference to the serial0 node. This change fixes the
stdout-path property for N1SDP, Morello and TC0 by pointing to the
right alias.

Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Change-Id: I3d403389a424569be56327fab4140fec06f96d37
2021-01-27 18:05:36 +00:00
Arunachalam Ganapathy b153ce0391 fdts: tc0: Add reserved-memory node for OP-TEE
Add reserved-memory region for OP-TEE and mark as no-map. This memory
region is used by OP-TEE as non-secure shared RAM.

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I5a22999a8c5550024d0f47e848d35924017df245
2020-12-14 18:02:38 +00:00
Arunachalam Ganapathy 39460d0570 plat: tc0: OP-TEE as S-EL1 SP with SPMC at S-EL2
This patch adds support to enable OP-TEE as S-EL1 SP with SPMC at S-EL2
     - create SPMC manifest file with OP-TEE as SP
     - add support for ARM_SPMC_MANIFEST_DTS build option
     - add optee entry with ffa as method in tc0.dts

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: Ia9b5c22c6f605d3886914bbac8ac45e8365671cb
2020-12-14 18:02:33 +00:00
Arunachalam Ganapathy a3ecbb3553 plat: tc0: Add TZC DRAM1 region for SPMC and trusted OS
- Reserve 32MB below ARM_AP_TZC_DRAM1_BASE for TC0_TZC_DRAM1
- Add TC0_NS_DRAM1 base and mapping
- Reserve memory region in tc0.dts

Change-Id: If2431f7f68e4255e28c86a0e89637dab7c424a13
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
2020-10-20 20:07:06 +00:00
Usama Arif 8f734c6528
fdts: tc0: update MHUv2 interrupt number
This is as part of the architecture change in TC0.

Change-Id: I470241f67938e7998941d26f0e8bc05073234152
Signed-off-by: Usama Arif <usama.arif@arm.com>
2020-09-22 17:06:43 +01:00
Avinash Mehta 0dc522943c Enabling DPU in dts file for TC0
This change replaces hdlcd with DPU in dts file for TC0

Change-Id: If25dfd3ddffc07279ab487f65e1bb82b27a26604
Signed-off-by: Avinash Mehta <avinash.mehta@arm.com>
2020-09-08 08:56:29 +01:00
Usama Arif 8ea4f80a7c
fdts: tc0: add support for cpu-idle-states
This includes both cpu and cluster sleep parameters.

Change-Id: I6a9e90b88508d6d2acd2538007cbbdd1cf976442
Signed-off-by: Usama Arif <usama.arif@arm.com>
2020-08-27 11:52:21 +01:00
Usama Arif a41973a9da
fdts: tc0: Add node for mmc
The pl180 mmc uses 3.3V fixed regulator and vexpress
sysreg for card detection and write protect.

Change-Id: I2513cfcb97217e282a081a700f3a9f723e8207ff
Signed-off-by: Usama Arif <usama.arif@arm.com>
2020-08-27 11:20:14 +01:00
Usama Arif f5c58af653 plat/arm: Introduce TC0 platform
This patch adds support for Total Compute (TC0) platform. It is an
initial port and additional features are expected to be added later.

TC0 has a SCP which brings the primary Cortex-A out of reset
which starts executing BL1. TF-A optionally authenticates the SCP
ram-fw available in FIP and makes it available for SCP to copy.

Some of the major features included and tested in this platform
port include TBBR, PSCI, MHUv2 and DVFS.

Change-Id: I1675e9d200ca7687c215009eef483d9b3ee764ef
Signed-off-by: Usama Arif <usama.arif@arm.com>
2020-05-27 12:31:04 +00:00