Commit Graph

1270 Commits

Author SHA1 Message Date
Manish Pandey 28623c102d Merge "fix: libc: use long for 64-bit types on aarch64" into integration 2021-11-08 21:34:42 +01:00
Scott Branden 4ce3e99a33 fix: libc: use long for 64-bit types on aarch64
Use long instead of long long on aarch64 for 64_t stdint types.
Introduce inttypes.h to properly support printf format specifiers for
fixed width types for such change.

Change-Id: I0bca594687a996fde0a9702d7a383055b99f10a1
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
2021-11-08 14:41:17 +00:00
André Przywara 683bb4d7bd Merge changes from topic "arm_fpga_auto" into integration
* changes:
  feat(arm_fpga): write UART baud base clock frequency into DTB
  feat(arm_fpga): query PL011 to learn system frequency
  refactor(arm_fpga): move command line code into separate function
  fix(fdt): avoid output on missing DT property
  feat(arm_fpga): add ITS autodetection
  feat(arm_fpga): determine GICR base by probing
  feat(gicv3): introduce GIC component identification
  feat(libfdt): also allow changing base address
  fix(arm_fpga): avoid re-linking from executable ELF file
2021-11-06 02:32:00 +01:00
Mark Dykes 25d7dafb2c Merge "feat(tc0): add Ivy partition" into integration 2021-11-05 21:09:38 +01:00
Andre Przywara 422b44fb56 feat(arm_fpga): write UART baud base clock frequency into DTB
Since we now autodetect the actual system frequency, which is also used
as the base for the UART baudrate generation, we should update the value
currently hard-coded in the DT. Otherwise Linux will reprogram the
divider using a potentially wrong base rate, which breaks the UART
output.

Find the DT node referenced by the UART node as the clock rate, and set
the "clock-frequency" property in that node to the detected system
frequency. This will let Linux reprogram the divider to the same value,
preserving the actual baudrate.

Change-Id: Ib5a936849f2198577b86509f032751d5386ed2f8
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-11-04 15:58:34 +00:00
Andre Przywara d850169c9c feat(arm_fpga): query PL011 to learn system frequency
The Arm FPGAs run in mostly one clock domain, which is used for the CPU
cores, the generic timer, and also the UART baudrate base clock. This
single clock can have different rates, to compensate for different IP
complexity. So far most images used 10 MHz, but different rates start to
appear.

To avoid patching both the arch timer frequency and UART baud base fixed
clock in the DTB manually, we would like to set the clock rate
automatically. Fortunately the SCP firmware has the actual clock rate
hard coded, and already programs the PL011 UART baud divider register
with the correct value to achieve a 38400 bps baudrate.

So read the two PL011 baudrate divider values and re-calculate the
original base clock from there, to use as the arch timer frequency. If
the arch timer DT node contains a clock-frequency property, we use that
instead, to support overriding and disabling this autodetection.

Change-Id: I9857fbb418deb4644aeb2816f1102796f9bfd3bb
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-11-04 15:58:34 +00:00
Andre Przywara 52b8f4465e refactor(arm_fpga): move command line code into separate function
The code dealing with finding the command line and inserting that into
the DTB is somewhat large, and drowns the other DT handlers in our
fpga_prepare_dtb() function.

Move that code into a separate function, to improve readability.

Change-Id: I828203c4bb248d38a2562fcb6afdefedf3179f8d
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-11-04 15:58:34 +00:00
Andre Przywara d7e39c43f2 feat(arm_fpga): add ITS autodetection
Some FPGAs come with a GIC that has an ITS block configured. Since the
ITS sits between the distributor and redistributors, we can autodetect
that, and already adjust the GICR base address.

To also make this ITS usable, add an ITS node to our base DTB, and
remove that should we not find an ITS during the scan for the
redistributor. This allows to use the same TF-A binary for FPGA images
with or without an ITS.

Change-Id: I4c0417dec7bccdbad8cbca26fa2634950fc50a66
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-11-04 15:58:34 +00:00
Andre Przywara 93b785f5ae feat(arm_fpga): determine GICR base by probing
When an Arm Ltd GIC (Arm GIC-[567]00) is instantiated with one or more
ITSes, the ITS MMIO frames appear between the distributor and
redistributor addresses. This makes the beginning of the redistributor
region dependent on the existence and number of ITSes.

To support various FPGA images, with and without ITSes, probe the
addresses in question, to learn whether they accommodate an ITS or a
redistributor. This can be safely done by looking at the PIDR[01]
registers, which contain an ID code for each region, documented in the
Arm GIC TRMs.

We try to find all ITSes instantiated, and skip either two or four 64K
frames, depending on GICv4.1 support. At some point we will find the
first redistributor; this address we then update in the DTB.

Change-Id: Iefb88c2afa989e044fe0b36b7020b56538c60b07
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-11-04 15:58:34 +00:00
Andre Przywara 4d585fe52f feat(libfdt): also allow changing base address
For platforms where we don't know the number of cores at compile time,
the size of the GIC redistributor frame is then also undetermined, since
it depends on this number of cores.
On top of this the GICR base address can also change, when an unknown
number of ITS frames (including zero) take up space between the
distributor and redistributor.

So while those two adjustments are done for independent reasons, the
code for doing so is very similar, so we should utilise the existing
fdt_adjust_gic_redist() function.

Add an (optional) gicr_base parameters to the prototype, so callers can
choose to also adjust this base address later, if needed.

Change-Id: Id39c0ba83e7401fdff1944e86950bb7121f210e8
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-11-04 15:58:34 +00:00
Andre Przywara a67ac7648c fix(arm_fpga): avoid re-linking from executable ELF file
When we build the convenience firmware package file for the Arm FPGA
boards (bl31.axf), we combine trampolines, the DTB and the actual BL31
code into one ELF file, which is more a "container with load addresses"
than an actual executable. So far ld was fine with us using bl31.elf as
an input file, but binutils 2.35 changed that and complains about
taking an *executable* ELF file as in *input* to the linker:
-----------------
aarch64-none-elf-ld.bfd: cannot use executable file 'build/arm_fpga/debug/./bl31/bl31.elf' as input to a link
-----------------

Fortunately we don't need the actual BL31 ELF file for *that* part of
the linking, so can use the just created bl31.bin binary version of it.
Actually that shrinks the file, as we needlessly included the .BSS
section in the final file before.

Using the binary works with both older and newer toolchains versions, so
let's do this unconditionally.

Change-Id: Ib7e697f8363499123f7cb860f118f182d0830768
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-11-04 15:58:34 +00:00
Olivier Deprez a19bd32ed1 feat(tc0): add Ivy partition
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
Change-Id: Ie9d6a77722b2350c8479ecf7b0df701428e4da73
2021-11-03 10:47:09 -05:00
Manish Pandey 6482255d5d Merge "refactor(fvp_r): remove unused files and clean up makefiles" into integration 2021-10-29 18:48:52 +02:00
johpow01 88c227374c refactor(fvp_r): remove unused files and clean up makefiles
This patch removes files that are not used by TF-R as well as
removes unused generic files from the TF-R makefile.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Idb15ac295dc77fd38735bf2844efdb73e6f7c89b
2021-10-29 09:43:19 -05:00
Manish Pandey e33ca7b44a Merge changes from topic "ck/mpmm" into integration
* changes:
  docs(maintainers): add Chris Kay to AMU and MPMM
  feat(tc): enable MPMM
  feat(mpmm): add support for MPMM
  feat(amu): enable per-core AMU auxiliary counters
  docs(amu): add AMU documentation
  refactor(amu): refactor enablement and context switching
  refactor(amu): detect auxiliary counters at runtime
  refactor(amu): detect architected counters at runtime
  refactor(amu): conditionally compile auxiliary counter support
  refactor(amu): factor out register accesses
  refactor(amu)!: privatize unused AMU APIs
  refactor(amu)!: remove `PLAT_AMU_GROUP1_COUNTERS_MASK`
  build(amu): introduce `amu.mk`
  build(fconf)!: clean up source collection
  feat(fdt-wrappers): add CPU enumeration utility function
  build(fdt-wrappers): introduce FDT wrappers makefile
  build(bl2): deduplicate sources
  build(bl1): deduplicate sources
2021-10-29 14:45:28 +02:00
Manish Pandey 7ab8339064 Merge "feat(plat/arm/sgi): increase max BL2 size" into integration 2021-10-28 14:28:14 +02:00
Manish Pandey 04deada5d1 Merge "fix(spmd): revert workaround hafnium as hypervisor" into integration 2021-10-27 12:59:19 +02:00
Olivier Deprez 3221fce842 fix(spmd): revert workaround hafnium as hypervisor
This change essentially reverts [1] by removing the BL31 workaround
forcing the dtb address when Hafnium is loaded as an Hypervisor.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/9569

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I302161d027261448113c66b7fafa9c11620b54ef
2021-10-26 18:19:47 +02:00
Chris Kay c19a82bef0 feat(tc): enable MPMM
This change enables MPMM and adds, to the TC firmware configuration
device tree, the AMU counters representing the "gears" for the
Maximum Power Mitigation Mechanism feature of the Cortex-X2,
Cortex-A710 and Cortex-A510:

- Gear 0: throttle medium and high bandwidth vector and viruses.
- Gear 1: throttle high bandwidth vector and viruses.
- Gear 2: throttle power viruses only.

This ensures these counters are enabled and context-switched as
expected.

Change-Id: I6df6e0fe3a5362861aa967a78ab7c34fc4bb8fc3
Signed-off-by: Chris Kay <chris.kay@arm.com>
2021-10-26 12:15:43 +01:00
Chris Kay e04da4c8e1 build(fconf)!: clean up source collection
Including the FCONF Makefile today automatically places the FCONF
sources into the source list of the BL1 and BL2 images. This may be
undesirable if, for instance, FCONF is only required for BL31.

This change moves the BL1 and BL2 source appends out of the common
Makefile to where they are required.

BREAKING CHANGE: FCONF is no longer added to BL1 and BL2 automatically
when the FCONF Makefile (`fconf.mk`) is included. When including this
Makefile, consider whether you need to add `${FCONF_SOURCES}` and
`${FCONF_DYN_SOURCES}` to `BL1_SOURCES` and `BL2_SOURCES`.

Change-Id: Ic028eabb7437ae95a57c5bcb7821044d31755c77
Signed-off-by: Chris Kay <chris.kay@arm.com>
2021-10-26 12:14:29 +01:00
Chris Kay 1fa05dab07 build(fdt-wrappers): introduce FDT wrappers makefile
This has been introduced to simplify dependencies on the FDT wrappers.
We generally want to avoid pulling in components on a file-by-file
basis, particularly as we are trying to draw conceptual boxes around
components in preparation for transitioning the build system to CMake,
where dependencies are modelled on libraries rather than files.

Signed-off-by: Chris Kay <chris.kay@arm.com>
Change-Id: Idb7ee05a9b54a8caa3e07f36e608867e20b6dcd5
2021-10-26 12:14:28 +01:00
Vijayenthiran Subramaniam 7186a29bbf feat(plat/arm/sgi): increase max BL2 size
Increase `PLAT_ARM_MAX_BL2_SIZE` to 128KiB for the primary chip to
accommodate debug builds with log level set to verbose
(LOG_LEVEL=LOG_LEVEL_VERBOSE).

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I9dc835430f61b0d0c46a75f7a36d67f165293c8c
2021-10-26 16:43:46 +05:30
johpow01 4cb576a0c5 fix(cpu): correct Demeter CPU name
This patch changes Cortex Demeter to Neoverse Demeter.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I7306d09ca60e101d0a96c9ceff9845422d75c160
2021-10-21 20:12:28 +02:00
johpow01 fb9e5f7bb7 feat(cpu): add support for Hunter CPU
This patch adds the basic CPU library code to support the Hunter CPU
in TF-A. This CPU is based on the Makalu core so that library code
was adapted as the basis for this patch.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I956b2dc0f43da7cec3e015252392e2694363e1b3
2021-10-20 20:05:59 +02:00
Olivier Deprez e43949e240 Merge changes I6daaed9a,I3ef31047 into integration
* changes:
  feat(plat/arm): Add DRAM2 to TZC non-secure region
  fix(plat/arm): remove unused memory node
2021-10-19 11:58:56 +02:00
Manish Pandey 31e18c02e4 Merge "fix(fvp_r): fix compilation error in release mode" into integration 2021-10-13 17:43:44 +02:00
Manish Pandey 7d96e79a1a fix(fvp_r): fix compilation error in release mode
assert() is not used in release mode and complaining about unused
variable "desc".

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ib919eb27532344a25be0b6ece7e239efa87be744
2021-10-13 13:45:45 +01:00
Manish V Badarkhe 8a89e1898b refactor(measured boot): make measurement strings compliant with SBSG
Made measurement strings compliant to Server Base Security Guide
(SBSG, Arm DEN 0086) hence updated measurement strings for BL32, BL31,
and SCP_BL2 images. As the GPT image is not get measured by BL2 so
removed its measurement string.
Also, namespaced measurement string defines that were looking quite
generic.

Change-Id: Iaa17c0cfeee3d06dc822eff2bd553da23bd99b76
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:48 +01:00
Manish V Badarkhe 0500f4479e feat(plat/fvp): pass Event Log addr and size from BL1 to BL2
Introduced functions to set and get Event log information
(tpm_event_log address and its size).

In FVP platform case, measured boot with Event Log backend flow
work as below
1. event_log_init function called by BL1 to initialize Event Log
   module
2. arm_set_tb_fw_info function called by BL1 to set the
   'tpm_event_log_addr' and 'tpm_event_log_size' properties
   in tb_fw_config
3. arm_get_tb_fw_info function called by BL2 to get tpm Event Log
   parameters set by BL1. These parameters used by the BL2 to
   extend the tpm Event Log records, and use these parameters
   to initialize Event Log using event_log_init function
4. arm_set_nt_fw_info and arm_set_tos_fw_info function called by
   BL2 to set 'tpm_event_log' address and its size properties in
   nt_fw_config and tos_fw_config respectively

Alongside, this patch created a separate instances of plat_mboot_init
and plat_mboot_finish APIs for BL1 and BL2.

This patch is tested using the existing measured boot test configuration
in jenkins CI.

Change-Id: Ib9eca092afe580df014541c937868f921dff9c37
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:48 +01:00
Manish V Badarkhe e742bcdae0 feat(measured_boot): update tb_fw_config with event log properties
Making tb_fw_config ready to pass the Event Log base address
and size information to BL2.

Change-Id: I5dd0e79007e3848b5d6d0e69275a46c2e9807a98
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:48 +01:00
Manish V Badarkhe 48ba0345f7 feat(measured_boot): image hash measurement and recording in BL1
It looks safer and cleaner approach to record the measurement taken by
BL1 straightaway in TCG Event Log instead of deferring these recordings
to BL2.
Hence pull in the full-fledged measured boot driver into BL1 that
replaces the former ad-hoc platform interfaces i.e.
bl1_plat_set_bl2_hash, bl2_plat_get_hash.

As a result of this change the BL1 of Arm FVP platform now do the
measurements and recordings of below images:
1. FW_CONFIG
2. TB_FW_CONFIG
3. BL2

Change-Id: I798c20336308b5e91b547da4f8ed57c24d490731
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:48 +01:00
Manish V Badarkhe efa6521878 refactor(measured boot): remove platform calls from Event Log driver
Currently, the Event Log driver does platform layer work by invoking
a few platform functions in the 'event_log_finalise' call. Doing
platform work does not seem to be the driver's responsibility, hence
moved 'event_log_finalise' function's implementation to the platform
layer.

Alongside, introduced few Event Log driver functions and done
some cosmetic changes.

Change-Id: I486160e17e5b0677c734fd202af7ccd85476a551
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:47 +01:00
Manish V Badarkhe eab78e9ba4 refactor(measured_boot): remove passing of BL2 hash via device tree
Subsequent patches will provide a solution to do the BL2 hash measurement
and recording in BL1 itself, hence in preparation to adopt that solution
remove the logic of passing BL2 hash measurement to BL2 component
via TB_FW config.

Change-Id: Iff9b3d4c6a236a33b942898fcdf799cbab89b724
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:47 +01:00
Sandrine Bailleux 8cd09cfc91 refactor(measured boot): move BL2 measurement to platform layer
Right now, event_log_init() does 2 things:
1) It writes all the necessary TCG data structures in the event log buffer.
2) It writes the first measurement (BL2's).

Step 2) introduces in the TCG event log driver an assumption on what
is getting measured and in what order. Ideally, the driver should only
be concerned about generic operations, such as initializing the event
log or recording a measurement in it. As much as possible, we should
design the driver such that it could be reused in another project that
has a different measure boot flow.

For these reasons, move step 2) up to the caller, plat_mboot_init() in
this case. Make event_log_record() a public function for this purpose.

This refactoring will also help when we make BL1 record BL2's
measurement into the event log (instead of BL2). Both BL1 and BL2 will
need to call the driver's init function but only BL1 will need
recording BL2's measurement. We can handle this through different
implementations of plat_mboot_init() for BL1 and BL2, leaving the TCG
event log driver unchanged.

Change-Id: I358e097c1eedb54f82b866548dfc6bcade83d519
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-10-12 17:53:47 +01:00
Manish V Badarkhe 140d9cb3e7 refactor(measured boot): move image measurement to generic layer
Right now, the assumption is that the platform post-load hook takes
care of measuring the image that just got loaded. This is how it's
implemented on FVP.

This patch moves the measurement into the generic code
instead. load_auth_image() now calls plat_mboot_measure_image(),
which is a new platform interface introduced in this patch to measure
an image. This is called just after authenticating the image.

Implement plat_mboot_measure_image() for the Arm FVP platform. The code
is copied straight from the post-load hook.

As a result, the FVP specific implementation of
arm_bl2_plat_handle_post_image_load() is no longer needed. We can go
back to using the Arm generic implementation of it.

Change-Id: I7b4b8d28941a865e10af9d0eadaf2e4850942090
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:47 +01:00
Sandrine Bailleux d89bec83dc build(measured boot): rename measured boot makefile
With the removal of the generic functions measured_boot_init()/finish(),
measured_boot.mk becomes specific to the TCG event log backend. Change
its file name to event_log.mk.
Also, the Event Log driver is one of the backend of measured boot hence
created a separate folder for it under the measured_boot directory.

Alongside done some cosmetic changes (adding a comment and fixing
identation).

Change-Id: I4ce3300e6958728dc15ca5cced09eaa01510606c
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-10-12 17:53:47 +01:00
Manish V Badarkhe 47bf3ac31e feat(measured boot): move init and teardown functions to platform layer
Right now, the measured boot driver is strongly coupled with the TCG
event log driver. It would not be possible to push the measurements
somewhere else, for instance to a physical TPM.

To enable this latter use case, turn the driver's init and teardown
functions into platform hooks. Call them bl2_plat_mboot_init()/finish().
This allows each platform to implement them appropriately, depending on
the type of measured boot backend they use. For example, on a platform
with a physical TPM, the plat_mboot_init() hook would startup the TPM
and setup it underlying bus (e.g. SPI).

Move the current implementation of the init and teardown function to the
FVP platform layer.

Finally move the conditional compilation logic (#if MEASURED_BOOT) out
of bl2_main() to improve its readability. Provide a dummy implementation
in the case measured boot is not included in the build.

Change-Id: Ib6474cb5a9c1e3d4a30c7f228431b22d1a6e85e3
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:47 +01:00
Sandrine Bailleux 4a24707f94 refactor(measured boot): rename tpm_record_measurement()
tpm_record_measurement() function name suggests that:

 - It only records a measurement but does not compute it.
   This is not the case, the function does both.

 - It stores this measurement into a TPM (discrete chip or fTPM).
   This is not the case either, the measurement is just stored into
   the event log, which is a data structure hold in memory, there is
   no TPM involvement here.

To better convey the intent of the function, rename it into
event_log_measure_and_record().

Change-Id: I0102eeda477d6c6761151ac96759b31b6997e9fb
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-10-12 17:53:47 +01:00
Usama Arif 76b4a6bb20
feat(plat/arm): Add DRAM2 to TZC non-secure region
This allows to increase the total DRAM to 8GB.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I6daaed9a0b7a11d665b2f56e6432a1ef87bfaa38
2021-10-12 13:35:17 +01:00
André Przywara c0d359b69a Merge "fix(arm_fgpa): allow build after MAKE_* changes" into integration 2021-10-11 10:26:37 +02:00
Joanna Farley ae720acd71 Merge "feat(fvp_r): configure system registers to boot rich OS" into integration 2021-10-07 18:14:43 +02:00
Andre Przywara 9d38a3e698 fix(arm_fgpa): allow build after MAKE_* changes
Commit 434d0491c5 ("refactor(makefile): remove BL prefixes in build
macros") changed the MAKE_S macro to expect "bl31" instead of just "31".

Adjust our calls to MAKE_S and MAKE_LD to fix the build for arm_fpga.

Change-Id: I2743e421c10eaecb39bfa4515ea049a1b8d18fcb
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-07 14:21:26 +01:00
Manish Pandey 330669de94 Merge "refactor(fvp_r): tidy up platform port [1]" into integration 2021-10-06 23:55:26 +02:00
Soby Mathew 1d65121174 Merge changes from topic "za/feat_rme" into integration
* changes:
  refactor(gpt): productize and refactor GPT library
  feat(rme): disable Watchdog for Arm platforms if FEAT_RME enabled
  docs(rme): add build and run instructions for FEAT_RME
  fix(plat/fvp): bump BL2 stack size
  fix(plat/fvp): allow changing the kernel DTB load address
  refactor(plat/arm): rename ARM_DTB_DRAM_NS region macros
  refactor(plat/fvp): update FVP platform DTS for FEAT_RME
  feat(plat/arm): add GPT initialization code for Arm platforms
  feat(plat/fvp): add memory map for FVP platform for FEAT_RME
  refactor(plat/arm): modify memory region attributes to account for FEAT_RME
  feat(plat/fvp): add RMM image support for FVP platform
  feat(rme): add GPT Library
  feat(rme): add ENABLE_RME build option and support for RMM image
  refactor(makefile): remove BL prefixes in build macros
  feat(rme): add context management changes for FEAT_RME
  feat(rme): add Test Realm Payload (TRP)
  feat(rme): add RMM dispatcher (RMMD)
  feat(rme): run BL2 in root world when FEAT_RME is enabled
  feat(rme): add xlat table library changes for FEAT_RME
  feat(rme): add Realm security state definition
  feat(rme): add register definitions and helper functions for FEAT_RME
2021-10-06 19:44:28 +02:00
Manish Pandey 28bbbf3bf5 feat(fvp_r): configure system registers to boot rich OS
Following system registers are modified before exiting EL2 to allow
u-boot/Linux to boot
  1. CNTHCTL_EL2.EL1PCTEN -> 1
     Allows U-boot to use physical counters at EL1
  2. VTCR_EL2.MSA -> 1
     Enables VMSA at EL1, which is required by U-Boot and Linux.
  3. HCR_EL2.APK = 1 & HCR_EL2.API = 1
     Disables PAuth instruction and register traps in EL1

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I58f45b6669a9ad1debb80265b243015c054a9bb1
2021-10-06 17:53:28 +01:00
Manish Pandey 4796c6ca89 refactor(fvp_r): tidy up platform port [1]
Following changes done:
  1. Remove "fvp_r" specific check from bl1.mk
  2. Override BL1_SOURCES in fvp_r platform.mk
  3. Regroup source files
  4. Remove platform specific change from arm_common

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I74d0b1f317853ab1333744d8da5c59f937789547
2021-10-06 17:38:06 +01:00
johpow01 f19dc624a1 refactor(gpt): productize and refactor GPT library
This patch updates and refactors the GPT library and fixes bugs.

- Support all combinations of PGS, PPS, and L0GPTSZ parameters.
- PPS and PGS are set at runtime, L0GPTSZ is read from GPCCR_EL3.
- Use compiler definitions to simplify code.
- Renaming functions to better suit intended uses.
- MMU enabled before GPT APIs called.
- Add comments to make function usage more clear in GPT library.
- Added _rme suffix to file names to differentiate better from the
  GPT file system code.
- Renamed gpt_defs.h to gpt_rme_private.h to better separate private
  and public code.
- Renamed gpt_core.c to gpt_rme.c to better conform to TF-A precedent.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I4cbb23b0f81e697baa9fb23ba458aa3f7d1ed919
2021-10-05 16:24:57 -05:00
Madhukar Pappireddy e2e0444443 Merge changes from topic "arm_fpga_resmem" into integration
* changes:
  fix(arm_fpga): reserve BL31 memory
  fix(arm_fpga): limit BL31 memory usage
2021-10-05 22:55:13 +02:00
Madhukar Pappireddy d7fe4cb036 Merge changes from topic "ethosn-multi-device" into integration
* changes:
  feat(drivers/arm/ethosn)!: multi-device support
  feat(fdt): add for_each_compatible_node macro
2021-10-05 22:15:40 +02:00
Zelalem Aweke 07e96d1d29 feat(rme): disable Watchdog for Arm platforms if FEAT_RME enabled
In the typical TF-A boot flow, the Trusted Watchdog is started
at the beginning of BL1 and then stopped in BL1 after returning
from BL2. However, in the RME boot flow there is no return path
from BL2 to BL1. Therefore, disable the Watchdog if ENABLE_RME is set.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: Id88fbfab8e8440642414bed48c50e3fcb23f3621
2021-10-05 19:00:45 +02:00