Commit Graph

18 Commits

Author SHA1 Message Date
Jacky Bai aeff14640a feat(imx8mp): enable BL32 fdt overlay support on imx8mp
Allow OP-TEE to generate a device-tree overlay binary
that will be applied by u-boot on the regular dtb.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Idfd268cdd8b7ba321f8e1b9b85c2bba7ffdeddf0
2022-05-07 17:33:58 +08:00
Jacky Bai 8b9c21b480 feat(imx8mp): add trusty for imx8mp
Add trusty support on i.MX8MP.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I501ae76ac35b8c059b3f0a9ce1d51ed13cbdbfe2
2022-05-07 17:33:58 +08:00
Ji Luo 4f8d5b018e feat(imx8/imx8m): switch to xlat_tables_v2
spd trusty requires memory dynamic mapping feature to be
enabled, so we have to use xlat table library v2 instead
of v1.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I2813af9c7878b1fc2a59e27619c5b643af6a1e91
2022-05-07 17:33:58 +08:00
Jacky Bai d5ede92d78 feat(imx8m): enable the coram_s tz by default on imx8mn/mp
Enable the OCRAM_S TZ for secure protection by default on
i.MX8MN/i.MX8MP. And lock the ocram secure access configure
on i.MX8MM/i.MX8MP.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I2e24f4b823ee5f804415218d5c2e371f4e4c6fe1
2022-05-07 17:33:58 +08:00
Jacky Bai 0a76495bc2 feat(imx8m): enable the csu init on imx8m
Enable the CSU init on i.MX8M SoC family. The 'csu_cfg' array
is just a placeholder for now as example with limited config listed.
In real use case,user can add the CSU config as needed based on system design.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I1f7999efa346f18f6625ed8c478d088ed75f7833
2022-05-07 17:33:58 +08:00
Jacky Bai d76f012ea8 refactor(imx8m): replace magic number with enum type
Replace those RDC config related magic numbers with enum type

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6245ccfa74d079179dc0f205980c2daf5c7af786
2022-05-07 17:26:51 +08:00
Jacky Bai 0c6dfc4784 feat(imx8m): add imx csu/rdc enum type defines for imx8m
Add various enum type defines for CSU & RDC module for i.MX8M
family

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I70c050286919eab51c6c553912bd4be57bc60f81
2022-05-07 16:57:18 +08:00
Jacky Bai eb7fb938c3 fix(imx8m): check the validation of domain id
check the domain id to make sure it is in the valid range
to make sure no out of range access to the array.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Iccd7298eea390b6e68156bb356226839a23417ea
2022-05-07 16:32:05 +08:00
Jacky Bai d2a339dfa1 feat(imx8m): enable conditional build for SDEI
SDEI support on imx8m is an optional feature, so
make it conditional build, not enabled by default.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6e7e8d77959ea352bc019f8468793992ec7ecfc4
2022-05-07 16:30:03 +08:00
Ying-Chun Liu (PaulLiu) 32d5042204 fix(imx8mp): change the BL31 physical load address
Change BL31 load address to 0x970000. This was done by Change-Id
I96d572fc. But then changed back to 0x960000 by Change-Id I8308c629.
However, 0x970000 is the correct value thus we change it back again.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Change-Id: Ia0db4877123b89072f723d18e2bcce25ef38f47d
2022-01-12 10:33:27 +08:00
Ying-Chun Liu (PaulLiu) a16ecd2cff feat(plat/imx/imx8m/imx8mp): enable Trusted Boot
This patch enables Trusted Boot on the i.MX8MP with BL2 doing image
verification from a FIP prior to hand-over to BL31.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Change-Id: Iac1d1d62ea9858f67326a47c1e5ba377f23f9db5
2021-09-14 21:42:01 +08:00
Ying-Chun Liu (PaulLiu) 75fbf5546b feat(plat/imx/imx8m/imx8mp): add in BL2 with FIP
Adds bl2 with FIP to the build required for mbed Linux booting where
we do:

BootROM -> SPL -> BL2 -> OPTEE -> u-boot

If NEED_BL2 is specified then BL2 will be built and BL31 will have its
address range modified upwards to accommodate. BL31 must be loaded from a
FIP in this case.

If NEED_BL2 is not specified then the current BL31 boot flow is unaffected
and u-boot SPL will load and execute BL31 directly.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Change-Id: I78914d6002755f733ea866127cb47982a00f9700
2021-09-14 21:42:01 +08:00
Ying-Chun Liu (PaulLiu) f696843eab feat(plat/imx/imx8m/imx8mp): add initial definition to facilitate FIP layout
Adds a number of definitions consistent with the established RSB3720
equivalents specifying number of io_handles and block devices.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Change-Id: I401e48216d67257137351ee4d0b98904a76fa789
2021-09-14 21:42:01 +08:00
Ying-Chun Liu (PaulLiu) 91566d663b feat(plat/imx/imx8m/imx8mp): add imx8mp_private.h to the build
Allows for exporting of FIP related methods cleanly in a private header.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Change-Id: Iaaad4e69ef89c8a8a74648647d7fd09cd0fdd12a
2021-09-14 21:42:01 +08:00
Peng Fan 6b63125c41 feat(plat/imx8m): add sdei support for i.MX8MP
Add sdei support for i.MX8MM, this is to let jailhouse Hypervisor
could use SDEI to do hypervisor management, after physical IRQ
has been disabled routing.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: I8308c629448bd8adca9d3d25701adcf0c5a6afc2
2021-06-12 21:53:59 +08:00
Jacky Bai 7f9390d3a3 plat: imx8mp: change the bl31 physical load address
on i.MX8MP A1 silicon, the OCRAM space is extended to 512K + 64K,
currently, OCRAM @0x960000-0x980000 is reserved for BL31, it will
leave the last 64KB in non-continuous space. To provide a continuous
384KB + 64KB space for generic use, so move the BL31 space to
0x970000-0x990000 range.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I96d572fc0f87f05a60f55e0552a68b6e70f8e7f4
2021-04-30 12:28:41 +02:00
Jacky Bai fb9212be17 plat: imx8m: Correct the imr mask reg offset
The number of gpc imr mask reg & the offset is different
on some SOC, so correct it & replace the magic number with
macro define.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Ic701675cdd92e043dcd7f06722f2e871068aec74
2020-08-19 09:46:11 +00:00
Jacky Bai a775ef25c3 plat: imx8mp: Add the basic support for i.MX8MP
The i.MX 8MP Media Applications Processor is part of the growing
i.MX8M family targeting the consumer and industrial market. It brings
an effective Machine Learning and AI accelerator that enables a new
class of applications. It is built in 14LPP to achieve both high
performance and low power consumption and relies on a powerful fully
coherent core complex based on a quad core Arm Cortex-A53 cluster and
Cortex-M7 low-power coprocessor, audio digital signal processor, machine
learning and graphics accelerators.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I98311ebc32bee20af05031492e9fc24d06e55f4a
2020-07-10 16:19:25 +08:00