Commit Graph

19 Commits

Author SHA1 Message Date
Julius Werner 3e02c7436c plat/rockchip: Use new bl31_params_parse_helper()
The Rockchip platform is a prime candidate for switching to the new
bl31_params_parse_helper(), so switch it over. This will allow BL2
implementations on this platform to transparently switch over to the
version 2 parameter structure.

Change-Id: I540741d2425c93f66c8697ce749a351eb2b3a7e8
Signed-off-by: Julius Werner <jwerner@chromium.org>
2019-07-24 11:04:03 -07:00
Julius Werner c1185ffde1 plat/rockchip: Switch to use new common BL aux parameter library
This patch changes all Rockchip platforms to use the new common BL aux
parameter helpers. Since the parameter space is now cleanly split in
generic and vendor-specific parameters and the COREBOOT_TABLE
parameter is now generic, the parameter type number for that parameter
has to change. Since it only affects coreboot which always builds TF as
a submodule and includes its headers directly to get these constants,
this should not cause any issues. In general, after this point, we
should avoid changing already assigned parameter type numbers whenever
possible.

Change-Id: Ic99ddd1e91ff5e5fe212fa30c793a0b8394c9dad
Signed-off-by: Julius Werner <jwerner@chromium.org>
2019-07-23 20:25:30 -07:00
Ambroise Vincent 5b6ebeec9c Remove MULTI_CONSOLE_API flag and references to it
The new API becomes the default one.

Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-06-28 10:52:48 +01:00
Christoph Müllner 33218d2a81 rockchip: Disable binary generation for all SoCs.
All supported Rockchip SoCs (RK3288, RK3328, RK3368 and RK3399)
have non-continuous memory areas in the linker script with a huge
gap between them. This results in extremely padded binary images
with a size of about 4 GiB.

E.g. on the RK3399 we have the following memory areas (and base addresses):
RAM (0x1000), SRAM (0xFF8C0000), and PMUSRAM (0xFF3B0000).

Consumers of the TF-A project (e.g. coreboot or U-Boot) therefore
use the ELF image instead, which has a size of a few hundred kBs.

In order to prevent the generation of a huge and useless file,
this patch disables the binary generation for all affected Rockchip
SoCs.

Signed-off-by: Christoph Müllner <christophm30@gmail.com>
Change-Id: I4ac65bdf1e598c3e1a59507897d183aee9a36916
2019-05-02 12:27:19 +02:00
Christoph Müllner f476e63f7a rockchip: Add params_setup to RK3328.
params_setup.c provides the function params_early_setup, which
takes care of parsing ATF parameters (bl31_plat_param array,
fdt or coreboot table). As params_early_setup is defined as weak
symbol in bl31_plat_setup.c, providing a platform-specific
bl31_plat_setup implementation is optional.

This patch adds the rockchip-common params_setup.c to the sources
for RK3328. This streamlines the parameter handling for all supported
rockchip SoCs.

Signed-off-by: Christoph Müllner <christophm30@gmail.com>
Change-Id: I071c03106114364ad2fc408e49cc791fe5b35925
2019-05-01 17:52:53 +02:00
Heiko Stuebner 4200e5aae7 rockchip: only include libfdt in non-coreboot cases
While mainline u-boot always expects to submit the devicetree
as platform param, coreboot always uses the existing parameter
structure. As libfdt is somewhat big, it makes sense to limit
its inclusion to where necessary and thus only to non-coreboot
builds.

libfdt itself will get build in all cases, but only the non-
coreboot build will actually reference and thus include it.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I4c5bc28405a14e6070917e48a526bfe77bab2fb7
2019-04-26 23:36:17 +02:00
Heiko Stuebner c3aaabaf7e rockchip: move pmusram assembler code to a aarch64 subdir
The current code doing power-management from sram is highly
arm64-specific so should live in a corresponding subdirectory
and not in the common area.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I3b79ac26f70fd189d4d930faa6251439a644c5d9
2019-04-25 13:37:56 +02:00
Heiko Stuebner 7029e80683 rockchip: add an fdt parsing stub for platform param
The Rockchip ATF platform can be entered from both Coreboot and U-Boot.
While Coreboot does submit the list of linked parameter structs as
platform param, upstream u-boot actually always provides a pointer
to a devicetree as parameter.
This results in current ATF not running at all when started from U-Boot.

To fix this, add a stub that checks if the parameter is a fdt so we
can at least boot and not get stuck. Later on we can extend this with
actual parsing of information from the devicetree.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-03-14 22:45:15 +01:00
Antonio Nino Diaz 5e447816c7 Remove unneeded include paths in PLAT_INCLUDES
Also, update platform_def.h guidelines about includes in the porting
guide.

Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-01 12:24:57 +00:00
Julius Werner 985ee0b7e8 drivers/console: Link console framework code by default
This patch makes the build system link the console framework code by
default, like it already does with other common libraries (e.g. cache
helpers). This should not make a difference in practice since TF is
linked with --gc-sections, so the linker will garbage collect all
functions and data that are not referenced by any other code. Thus, if a
platform doesn't want to include console code for size reasons and
doesn't make any references to console functions, the code will not be
included in the final binary.

To avoid compatibility issues with older platform ports, only make this
change for the MULTI_CONSOLE_API.

Change-Id: I153a9dbe680d57aadb860d1c829759ba701130d3
Signed-off-by: Julius Werner <jwerner@chromium.org>
2018-12-06 16:13:50 -08:00
Antonio Nino Diaz a9d5a3ff01 rockchip: Use common crash console functions
This platform depends on weak functions defined in
``plat/common/aarch64/platform_helpers.S`` that are going to be removed.

Change-Id: I5104d091c32271d77ed9690e9dc257c061289def
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-10-25 09:56:09 +01:00
Antonio Nino Diaz 2d6f1f01b1 rockchip: Migrate to new interfaces
- Migrate to new GIC interfaces.
- Migrate to bl31_early_platform_setup2().
- Use bl31_warm_entrypoint() instead of psci_entrypoint().
- Use PLAT_VIRT_ADDR_SPACE_SIZE and PLAT_PHY_ADDR_SPACE_SIZE.
- Update Makefile paths.
- Remove references to removed build options.
- Use private definition of bl31_params_t.

Change-Id: I860341594b5c868b2fcaa59d23957ee718472ef1
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-09-28 15:34:17 +01:00
Dimitris Papastamos 383c808999 Disable workaround for CVE-2017-5715 on unaffected platforms
Change-Id: Ib67b841ab621ca1ace3280e44cf3e1d83052cb73
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
2018-01-29 09:58:56 +00:00
Julius Werner 890abc33e4 rockchip: Move to MULTI_CONSOLE_API
This patch changes all Rockchip platforms to use the new
MULTI_CONSOLE_API. The platform-specific plat_crash_console
implementations are removed so that the platform can use the ones from
the common platform code instead.

Also change the registers used in plat_crash_print_regs. The existing
use of x16 and x17 has always been illegal, since those registers are
reserved for use by the linker as a temporary scratch registers in
intra-procedure-call veneers and can never be expected to maintain their
values across a function call.

Change-Id: I8249424150be8d5543ed4af93b56756795a5288f
Signed-off-by: Julius Werner <jwerner@chromium.org>
2018-01-19 15:21:12 -08:00
Julius Werner 3c250b9ab6 rockchip: Use coreboot-supplied serial console on coreboot systems
This patch changes all Rockchip platforms to initialize the serial
console with information supplied by coreboot rather than hardcoded
base address and divisor values if BL31 is run on top of coreboot.
Moving the BL2-to-BL31 parameter parsing as early as possible to ensure
that the console is available for all following code.

Also update the Rockchip platform to use MULTI_CONSOLE_API.

Change-Id: I670d350fa2f8b8133539f91ac14977ab47db60d9
Signed-off-by: Julius Werner <jwerner@chromium.org>
2018-01-19 15:21:12 -08:00
David Cunado 3872fc2d1f Do not enable SVE on pre-v8.2 platforms
Pre-v8.2 platforms such as the Juno platform does not have
the Scalable Vector Extensions implemented and so the build
option ENABLE_SVE is set to zero.

This has a minor performance improvement with no functional
impact.

Change-Id: Ib072735db7a0247406f8b60e325b7e28b1e04ad1
Signed-off-by: David Cunado <david.cunado@arm.com>
2017-11-30 17:45:23 +00:00
Lin Huang bc5c30073e rockchip: add pmusram section
the function pmu_cpuon_entrypoint() need to run in the pmusram,
we just copy bin file to pmusram before, now we add pmusram section
and link pmu_cpuon_entrypoint() to pmusram directly

Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2017-06-08 09:59:49 +08:00
dp-arm c3e70be1c1 Use SPDX license identifiers for remaining files
Change-Id: I7f54f45db65f32481cc05e1bd2c9c683b756e19a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-10 15:16:34 +01:00
tony.xie 0d5ec955b8 rockchip: rk3328: support rk3328
rk3328 is a Quad-core soc and Cortex-a53 inside!
This patch supports the following functions:
1、power up/off cpus
2、suspend/resume cpus
3、suspend/resume system
4、reset system
5、power off system

Change-Id: I60687058d13912c6929293b06fed9c6bc72bdc84
Signed-off-by: tony.xie <tony.xie@rock-chips.com>
2017-04-25 11:10:56 +08:00