Commit Graph

272 Commits

Author SHA1 Message Date
Tejas Patel b6d7b3e9d6 plat: xilinx: versal: Add support to get clock rate value
Add support to get clock's rate value.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I3ed881053ef323b2ca73e13edd0affda860d381d
2020-12-07 11:10:13 +00:00
Tejas Patel 07d8a5f7dc plat: xilinx: versal: Add support of set max latency for the device
Add support of set max latency, to change in the maximum powerup latency
requirements for a specific device currently used by Subsystem.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I8749886abb1a7884a42c4d156d89c9cd562a5b1a
2020-12-07 11:10:07 +00:00
Ravi Patel 2cc1fa9537 plat: versal: Add InitFinalize API call
Add support to call InitFinalize API in Versal which calls
corresponding LibPM API.

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I3428b7245b4db1ef6db8a90b7ad20b6e484ed3b2
2020-12-07 11:10:01 +00:00
Rajan Vaja 1ba2d84fe2 xilinx: versal: Updated Response of QueryData API call
For the current XilPM calls, The handler of IPI returns information
with 16 Bytes data.
So during QueryData API call for the ClockName and PinFunctionName,
response data(name of clock or function) response[0..3] are used to
return name. And status is not being returned for such API.

Updated XilPM calls reply in a consistent way and The handler of IPI
return information with 32Bytes data. Where response[0] always set
to status.
For the version-2 of QueryData API, during call for the ClockName
and PinFunctionName, response data(name of clock or function) get as
response[1...4].

To support both the version of QueryData API, added version based
compatibility by the use of feature check.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I336128bff7bbe659903b0f8ce20ae6da7e3b51b4
2020-12-07 11:09:56 +00:00
Venkatesh Yadav Abbarapu abf27efac6 plat:xilinx:versal: Use defaults when PDI is without sw partitions
In JTAG mode check the ATF handoff structure, if the magic string
is not present then use bl32 and bl33 default values.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I1f2c4a2060d8a2e70d3b5fb2473124b685f257fc
2020-12-07 11:09:47 +00:00
Ravi Patel addc4e969b plat: xilinx: Mask unnecessary bytes of return error code
Versal firmware adds extra error codes along with PM error codes
while sending response to driver. This makes incorrect error
identification at driver side.

To fix this, mask the unnecessary error bytes before sending the
error code to the driver.

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I18c2f3bd2d067e91344852c2f0c1bafea0e6eb23
2020-12-07 11:08:09 +00:00
Ravi Patel d4c7b55050 xilinx: versal: Skip store/restore of GIC during CPU idle
GIC registers needs to be stored/restored during system
suspend/resume only and not during CPU idle.
During CPU idle, minimum 1 CPU is in ON state.

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I5de2ce3a61bf4260f9385349202b0f592a47aaba
2020-12-07 11:07:41 +00:00
Venkatesh Yadav Abbarapu 4b8ab607ea plat: versal: Update API list in feature check
Add below API in feature check list which is actually present in
firmware:
- PM_GET_CHIPID

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I98b82da74164f065c8835861f74b0f2855e9bcbf
2020-12-07 11:07:32 +00:00
Ravi Patel b05d2792ae xilinx: versal: Do not pass ACPU0 always in set_wakeup_source()
Existing code passes ACPU0 to LibPM as node_id in set_wakeup_source()
call because last suspending core will be ACPU0 in most of the case.

Now it may be possible that user may disable the ACPU0 using hot-plug
and after that it suspends Linux. So in that case ACPU0 will not be
last suspending core.

To overcome above scenario, pass the current running processor ID
while calling set_wakeup_source().

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: If15354c2150b5bb1305b5f93ca4e8c7a81d59f0a
2020-12-07 11:07:24 +00:00
Venkatesh Yadav Abbarapu 84f2e34fee plat: xilinx: zynqmp: Include GICv2 makefile
Update the xilinx platform makefile to include GICv2 makefile
instead of adding the individual files. Updating this change
as per the latest changes done in the commit #1322dc94f7.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I79d8374c47a7f42761d121522b32ac7a5021ede8
2020-12-03 20:30:37 -07:00
Madhukar Pappireddy 79df6ea430 Merge "plat: xilinx: Use fno-jump-tables flag in CPPFLAGS" into integration 2020-12-03 16:58:59 +00:00
Venkatesh Yadav Abbarapu e9930d42c7 plat: xilinx: Use fno-jump-tables flag in CPPFLAGS
From GCC-9 implementation of switch case was generated through jump tables,
because of which we are seeing 1MB increase in rodata section. To reduce
the size we are recommending to use fno-jump-tables.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I069733610809b8299fbf641f0ae35b359a8afd69
2020-11-12 10:40:16 +01:00
Davorin Mista a8b10c6490 zynqmp: pm: update error codes to match Linux and PMU Firmware
All EEMI error codes start with value 2000.

Note: Legacy error codes ARGS (=1) and NOTSUPPORTED (=4) returned by
current ATF code have been left in place.

Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
Acked-by: Will Wong <WILLW@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I939afa85957cac88025d82a80f9f6dd49be993b6
2020-11-12 10:27:14 +01:00
Mirela Simonovic c23cf05303 zynqmp: pm: Filter errors related to clock gate permissions
Linux clock framework cannot properly deal with these errors. When the
error is related to the lack of permissions to control the clock we
filter the error and report the success to linux. Before recent changes
in clock framework across the stack, this was done in the PMU-FW as a
workaround. Since the PMU-FW now handles clocks and the permissions to
control them using general principles rather than workarounds, it can
no longer distinguish such exceptions and it has to return no-access
error.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Will Wong <WILLW@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I1491a80e472f44e322a542b29a20eb1cb3319802
2020-11-12 10:26:57 +01:00
Jimmy Brisson 831b0e9824 Don't return error information from console_flush
And from crash_console_flush.

We ignore the error information return by console_flush in _every_
place where we call it, and casting the return type to void does not
work around the MISRA violation that this causes. Instead, we collect
the error information from the driver (to avoid changing that API), and
don't return it to the caller.

Change-Id: I1e35afe01764d5c8f0efd04f8949d333ffb688c1
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
2020-10-09 10:21:50 -05:00
Olivier Deprez 8eceb1c9c4 Merge "Create separate header for ARM specific SMCCC defines" into integration 2020-03-31 14:16:40 +00:00
Manish V Badarkhe 53adebad8b Create separate header for ARM specific SMCCC defines
Moved SMCCC defines from plat_arm.h to new <smccc_def.h> header
and include this header in all ARM platforms.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I4cbc69c7b9307461de87b7c7bf200dd9b810e485
2020-03-30 12:21:38 +00:00
Alexei Fedorov a6ea06f563 TF-A GICv3 driver: Introduce makefile
This patch moves all GICv3 driver files into new added
'gicv3.mk' makefile for the benefit of the generic driver
which can evolve in the future without affecting platforms.
The patch adds GICv3 driver configuration flags
'GICV3_IMPL', 'GICV3_IMPL_GIC600_MULTICHIP' and
'GICV3_OVERRIDE_DISTIF_PWR_OPS' described in
'GICv3 driver options' section of 'build-option.rst'
document.

NOTE: Platforms with GICv3 driver need to be modified to
include 'drivers/arm/gic/v3/gicv3.mk' in their makefiles.

Change-Id: If055f6770ff20f5dee5a3c99ae7ced7cdcac5c44
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-03-30 10:54:01 +00:00
Alexei Fedorov 6e19bd563d TF-A GICv3 driver: Separate GICD and GICR accessor functions
This patch provides separation of GICD, GICR accessor
functions and adds new macros for GICv3 registers access
as a preparation for GICv3.1 and GICv4 support.
NOTE: Platforms need to modify to include both
'gicdv3_helpers.c' and 'gicrv3_helpers.c' instead of the
single helper file previously.

Change-Id: I1641bd6d217d6eb7d1228be3c4177b2d556da60a
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-03-10 09:40:19 +00:00
Andre Przywara 78b40dce64 cdns: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.

Change-Id: I9f8b55414ab7965e431e3e86d182eabd511f32a4
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-02-25 09:34:38 +00:00
Andre Przywara f695e1e01a pl011: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.

Change-Id: I7a23327394d142af4b293ea7ccd90b843c54587c
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-02-25 09:34:38 +00:00
Tejas Patel 932f8b477b xilinx: versal: Pass result count to pm_get_callbackdata()
pm_get_callbackdata() expect result count and not total bytes of
result. Correct it by passing result count to pm_get_callbackdata().

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I01ce0002f7a753e81ea9fe65edde8420a13ed51a
2020-01-30 11:31:52 -08:00
Tejas Patel 70d0d759ad plat: xilinx: zynqmp: Use ARRAY_SIZE wherever possible
To find result count use ARRAY_SIZE for better readability.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I97201de4d43024e59fa78bd61937c86d47724ab5
2020-01-30 11:31:16 -08:00
Mark Dykes 9054018bd5 Merge "xilinx: Unify Platform specific defines for PSCI module" into integration 2020-01-24 17:03:17 +00:00
Deepika Bhavnani 6cdef9ba11 xilinx: Unify Platform specific defines for PSCI module
PLATFORM_CORE_COUNT - Unsigned int
PLATFORM_CLUSTER_COUNT - Unsigned int
PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int
PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int

Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: I76f5535f1cbdaf3fc1235cd824111d9afe8f7e1b
2020-01-24 10:02:15 -06:00
Manish Pandey 4e1b0b193c Merge "Xilinx zynqmp: add missing pin control group for ethernet 0." into integration 2020-01-24 10:02:07 +00:00
Venkatesh Yadav Abbarapu 31ce893ec2 xilinx: versal: PLM to ATF handover
Parse the parameter structure the PLM populates, to populate the
bl32 and bl33 image structures.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I317072d1086f6cc6f90883c1b8b6d086ff57b443
2020-01-23 03:01:22 -07:00
Venkatesh Yadav Abbarapu 4d9f825a56 xilinx: common: Move ATF handover to common file
ATF handover can be used by Xilinx platforms, so move it to common
file from platform specific files.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I5f0839351f534619de581d1953c8427a079487e0
2020-01-23 02:51:33 -07:00
Norbert Werner 67878cb0e5 Xilinx zynqmp: add missing pin control group for ethernet 0.
Signed-off-by: Norbert Werner <opensource@lab-w.org>
Change-Id: I3264515e5901689328861964ff664ff08b6e852c
2020-01-22 10:36:23 +00:00
Tejas Patel 92c30ac35b plat: xilinx: Move pm_client.h to common directory
Move pm_client.h to common directory to avoid duplication
of function declaration.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Iea542e681f42db089cccd9b24d286ac8f0a2ce35
2020-01-15 11:04:15 -08:00
Siva Durga Prasad Paladugu 7b9f0cfd8c plat: xilinx: versal: Make silicon default build target
This patch makes default build target as silicon instead of QEMU.
The default can be overwritten by specifying it through build flag
VERSAL_PLATFORM.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Ia4cb1df1f206db3e514e8ce969acca875e973ace
2020-01-15 11:04:10 -08:00
Siva Durga Prasad Paladugu d69bbd0e80 xilinx: versal: Wire silicon default setup
Add new option for serial and default clock setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I0ca7ad51637cdaa6bb891f22c53595d20da7236a
2020-01-15 11:04:05 -08:00
Venkatesh Yadav Abbarapu 29af478975 versal: Increase OCM memory size for DEBUG builds
ATF can't fit in current OCM size when the DEBUG is enabled, so
increase the OCM size to use 128Kb.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I2ebfd1f2e9db9c0b28770aea7f8fbf1a8a15787a
2020-01-15 11:04:00 -08:00
Siva Durga Prasad Paladugu f8a650c153 plat: xilinx: versal: Dont set IOU switch clock
The IOU switch clock will be set by PLM during boot so there is no need to
set here and hence this patch removes it.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I1512708411eb07a07c1a8fbd66575efee975431a
2020-01-15 11:03:56 -08:00
Siva Durga Prasad Paladugu c959c479eb arm64: versal: Adjust cpu clock for versal virtual
This patch modifies cpu clock for Xilinx Versal virtual
platform in order to keep same as used by QEMU.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I169d082462d7ce94a82c62966ab9eb122c5a3fee
2020-01-15 11:03:52 -08:00
Saeed Nowshadi f50828d52e xilinx: versal: Add support for PM_GET_OPERATING_CHARACTERISTIC EEMI call
This patch adds EEMI support for PM_GET_OPERATING_CHARACTERISTIC api id.  This
interface obtains operating characteristic of a device from PMC firmware.  The
'power', 'temperature', and 'latency' characteristic are the options that are
supported.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: If30959ba6a3a778a17df2a4281c2c09832cf7e92
2020-01-15 11:03:47 -08:00
Ravi Patel ea6e1c3942 plat: versal: Add Get_ChipID API
Add support for Get_ChipID API in Versal which calls corresponding
LibPM API.

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Acked-by: Jolly Shah <jolly.shah@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I25c4b301721d7989d982ac376c59195c55564022
2020-01-15 11:03:43 -08:00
Jolly Shah e4c54c0d2d plat: xilinx: versal: Add load Pdi API support
This patch adds support for load pdi api to enable loading
pdi from linux.

Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I48549e276e1f7b9be45a0bebf559f73bd09d5f69
2020-01-15 11:03:38 -08:00
Ravi Patel 39db98efc9 xilinx: versal: Add feature check API
Add API to check availability of given API in ATF
as well as platform management controller and returns
the supported version number.

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I608b38f60b36c4d105b7a205ecb8b02de0c00f3c
2020-01-15 11:03:34 -08:00
Tejas Patel 6e82cd8c9b xilinx: versal: Implement set wakeup source for client
Add support to set wakeup source for APU while suspending.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I4809fd83a710def8144fdad74990c45e62b8fdf3
2020-01-15 11:03:30 -08:00
Rajan Vaja 89224531b4 plat: xilinx: versal: Add GET_CALLBACK_DATA function
Add GET_CALLBACK_DATA function to get IPI callback
data in Linux during init suspend callback.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Ieb60e561b5f656611f0702c43ba6a4296a012651
2020-01-15 11:03:26 -08:00
Saeed Nowshadi 0abf4bba50 xilinx: versal: Add PSCI APIs for system shutdown & reset
Add following APIs in plat_psci to support system shutdown & reset:
- versal_system_off
- versal_system_reset

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Ia2c1a19ded18984b393e1fdee760bf48b45e9902
2020-01-15 11:03:20 -08:00
Tejas Patel 5a8ffeabf9 xilinx: versal: Add PSCI APIs for suspend/resume
Add following APIs in plat_psci to support suspend resume:
- versal_pwr_domain_off
- versal_pwr_domain_suspend
- versal_pwr_domain_suspend_finish
- versal_validate_power_state
- versal_get_sys_suspend_power_state

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Ife908a45f32e2037c9c19e13211a8e4b373b8342
2020-01-15 11:03:16 -08:00
Tejas Patel 394a65aa96 xilinx: versal: Remove no_pmc ops to ON power domain
Add PMC ops for power domain ON and remove no_pmc ops.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Id4308dfe124b60a751765beb3397d1b0071f14fc
2020-01-15 11:03:10 -08:00
Tejas Patel 42cd77e386 xilinx: versal: Add set wakeup source API
Implement set wakeup source API to pass SMC
call for set wakeup source to PLM (Platform Loader
and Manager).

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I654ce07235c0fc7dfcb81bf98820153255f61537
2020-01-15 11:03:06 -08:00
Tejas Patel 25b1a91033 xilinx: versal: Add client wakeup API
Implement client wakeup API for versal.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I31b1b362fe645a82f89ce2d698ee71eb00cf15dc
2020-01-15 11:03:02 -08:00
Tejas Patel 1f71e4fbfe xilinx: versal: Add query data API
Add PM_QUERY_DATA API to pass query data
EEMI call from Linux to PLM .

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I18735b72ab9cb62fb6cbc7582e77de6cb57f99b0
2020-01-15 11:02:58 -08:00
Tejas Patel c56be55df3 xilinx: versal: Add request wakeup API
Implement request wakeup API for versal.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I40a2a4ea85bf05623ac8a17ef4a6fa329babd27e
2020-01-15 11:02:54 -08:00
Tejas Patel ad19911c72 xilinx: versal: Add PM_INIT_FINALIZE API for versal
PM_INIT_FINALIZE is not required for versal. To use Linux
Zynqmp PM driver for versal, handle PM_INIT_FINALIZE API
in ATF for versal by always returning SUCCESS.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I6fe5445d78e713d70282ac8931ff8b17c96b2a14
2020-01-15 11:02:50 -08:00
Tejas Patel 4b0f32a411 xilinx: versal: Add support of PM_GET_TRUSTZONE_VERSION API
PM_GET_TRUSTZONE_VERSION API is required to use zynqmp-firmware
driver for versal. Add support of PM_GET_TRUSTZONE_VERSION API
for versal.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Ie1c859890096024cc8be67386e3fd0f5f8a4385f
2020-01-15 11:02:43 -08:00