Add support to get clock's rate value.
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I3ed881053ef323b2ca73e13edd0affda860d381d
Add support of set max latency, to change in the maximum powerup latency
requirements for a specific device currently used by Subsystem.
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I8749886abb1a7884a42c4d156d89c9cd562a5b1a
Add support to call InitFinalize API in Versal which calls
corresponding LibPM API.
Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I3428b7245b4db1ef6db8a90b7ad20b6e484ed3b2
For the current XilPM calls, The handler of IPI returns information
with 16 Bytes data.
So during QueryData API call for the ClockName and PinFunctionName,
response data(name of clock or function) response[0..3] are used to
return name. And status is not being returned for such API.
Updated XilPM calls reply in a consistent way and The handler of IPI
return information with 32Bytes data. Where response[0] always set
to status.
For the version-2 of QueryData API, during call for the ClockName
and PinFunctionName, response data(name of clock or function) get as
response[1...4].
To support both the version of QueryData API, added version based
compatibility by the use of feature check.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I336128bff7bbe659903b0f8ce20ae6da7e3b51b4
In JTAG mode check the ATF handoff structure, if the magic string
is not present then use bl32 and bl33 default values.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I1f2c4a2060d8a2e70d3b5fb2473124b685f257fc
Versal firmware adds extra error codes along with PM error codes
while sending response to driver. This makes incorrect error
identification at driver side.
To fix this, mask the unnecessary error bytes before sending the
error code to the driver.
Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I18c2f3bd2d067e91344852c2f0c1bafea0e6eb23
GIC registers needs to be stored/restored during system
suspend/resume only and not during CPU idle.
During CPU idle, minimum 1 CPU is in ON state.
Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I5de2ce3a61bf4260f9385349202b0f592a47aaba
Add below API in feature check list which is actually present in
firmware:
- PM_GET_CHIPID
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I98b82da74164f065c8835861f74b0f2855e9bcbf
Existing code passes ACPU0 to LibPM as node_id in set_wakeup_source()
call because last suspending core will be ACPU0 in most of the case.
Now it may be possible that user may disable the ACPU0 using hot-plug
and after that it suspends Linux. So in that case ACPU0 will not be
last suspending core.
To overcome above scenario, pass the current running processor ID
while calling set_wakeup_source().
Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: If15354c2150b5bb1305b5f93ca4e8c7a81d59f0a
Update the xilinx platform makefile to include GICv2 makefile
instead of adding the individual files. Updating this change
as per the latest changes done in the commit #1322dc94f7.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I79d8374c47a7f42761d121522b32ac7a5021ede8
Relax the 80 character line length, as done in checkpatch,
since Linux 5.7.
Change-Id: I093a2e6a45336339193173f7ff6a461279cf411d
Signed-off-by: Yann Gautier <yann.gautier@st.com>
This patch provides the following changes:
- Adds definition for FEAT_MTE3 value in ID_AA64PFR1_EL1 register
- Enables Memory Tagging Extension for FEAT_MTE3.
Change-Id: I735988575466fdc083892ec12c1aee89b5faa472
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Increase SHARED_RAM_SIZE in sbsa_qemu platform from 4KB to 8KB.
sbsa_qemu uses SHARED_RAM for mail box and hold state of each cpus. If
qemu is configured with 512 cpus, region size used by qemu is greater
than 4KB.
Signed-off-by: Masato Fukumori <masato.fukumori@linaro.org>
Change-Id: I639e44e89335249d385cdc339350f509e9bd5e36
It uses the system timer as "entropy" source in the same
way as QEMU, layerscape and others.
Change-Id: Icda17b78e85255bea96109ca2ee0e091187d62ac
Signed-off-by: Christoph Müllner <christophm30@gmail.com>
Enable basic support for Neoverse-N2 CPUs.
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I498adc2d9fc61ac6e1af8ece131039410872e8ad
This patch provides the changes listed below:
- Adds new bit fields definitions for SCTLR_EL1/2 registers
- Corrects the name of SCTLR_EL1/2.[20] bit field from
SCTLR_UWXN_BIT to SCTLR_TSCXT_BIT
- Adds FEAT_PANx bit field definitions and their possible
values for ID_AA64MMFR1_EL1 register.
- Adds setting of SCTLR_EL1.SPAN bit to preserve PSTATE.PAN
on taking an exception to EL1 in spm_sp_setup() function
(services\std_svc\spm_mm\spm_mm_setup.c)
Change-Id: If51f20e7995c649126a7728a4d0867041fdade19
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
This is not a standard string that any kernel recognises, nor do any of
the FDTs embedded in kernels specify this, nor does QEMU's virt machine.
Whilst its presence does no harm, it's not a thing code should consult
as a result, and so drop it in order to not cause confusion and risk
incorrect code being written to search for it.
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Change-Id: Iea3214a23181c54e600cf8f4f12dfc822140c23d
Include libraries needed to emulate Cortex-A72 on
sbsa-ref target of QEMU.
Signed-off-by: Tanmay Jagdale <tanmay.jagdale@linaro.org>
Change-Id: I98cf17b1662c70898977a841af07e07b5cfca8ba
Renamed SMC API from "plat_smccc_feature_available" to
"plat_is_smccc_feature_available" as per the current implementation.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Ib0fa400816fba61039c2029a9e127501a6a36811
renamed smcc api with correct name plat_is_smccc_feature_available
Change-Id: I277ece02bffc2caa065256576c1a047dfcde1c92
Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org>
* changes:
docs: marvell: Update build documentation to reflect mrvl_bootimage and mrvl_flash changes
plat: marvell: armada: Add new target mrvl_bootimage
plat: marvell: armada: a3k: Add support for building $(DOIMAGETOOL)
Marvell's TF-A fork has SUBVERSION set to devel-18.12.2.
The only differences between Marvell's devel-18.12.0 and devel-18.12.2
versions are documentation updates and cherry-picked patches from TF-A
upstream repository.
So upstream TF-A has already all changes from Marvell's TF-A devel-18.12.2
fork and therefore update SUBVERSION to reflect this state.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I5ce946a5176a5cbf124acd8037392463d586b072
Also add example how to build TF-A for A3720 Turris MOX board and also fix
style/indentation issues and information about default values.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I2dc957307b1b627b403a8d960e85f5ac9e15aee5
This new target builds boot-image.bin binary as described in documentation.
This image does not contain WTMI image and therefore WTP repository is not
required for building.
Having ability to build just this boot-image.bin binary without full
flash-image.bin is useful for A3720 Turris MOX board which does not use
Marvell's WTP and a3700_utils.
To reduce duplicity between a8k and a3k code, define this new target and
also definitions for $(BUILD_PLAT)/$(BOOT_IMAGE) in common include file
marvell_common.mk.
For this purpose it is needed to include plat/marvell/marvell.mk file from
a3700_common.mk unconditionally (and not only when WTP is defined). Now
when common file plat/marvell/marvell.mk does not contain definition for
building $(DOIMAGETOOL), it is possible to move its inclusion at the top of
the a3700_common.mk file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ic58303b37a1601be9a06ff83b7a279cb7cfc8280
Current binary wtptp/linux/tbb_linux which is specified in $(DOIMAGETOOL)
variable points to external pre-compiled Marvell x86_64 ELF linux binary
from A3700-utils-marvell WTP repository.
It means that currently it is not possible to compile TF-A for A3720 on
other host platform then linux x86_64.
Part of the A3700-utils-marvell WTP repository is also source code of
$(DOIMAGETOOL) TBB_Linux tool.
This change adds support for building $(DOIMAGETOOL) also for a3k platform.
After running $(MAKE) at appropriate subdirectory of A3700-utils-marvell
WTP repository, compiled TBB_linux tool will appear in WTP subdirectory
wtptp/src/TBB_Linux/release/. So update also $(DOIMAGETOOL) variable to
point to the correct location where TBB_linux was built.
To build TBB_linux it is required to compile external Crypto++ library
which is available at: https://github.com/weidai11/cryptopp.git
User needs to set CRYPTOPP_PATH option to specify path to that library.
After this change it is now possible to build whole firmware for A3720
platform without requirement to use pre-compiled/proprietary x86_64
executable binaries from Marvell.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I6f26bd4356778a2f8f730a223067a2e550e6c8e0
Updated the minor version to '4' to indicate 2.4 release
Change-Id: Ib142fa15baeb43025fae371c7649199b8121c18f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Tejas Patel
Ravi Patel
Rajan Vaja
Venkatesh Yadav Abbarapu
Madhukar Pappireddy
Manish Pandey
Yann Gautier
Olivier Deprez
Alexei Fedorov
Lauren Wehrmeister
Masato Fukumori
Christoph Müllner
Javier Almansa Sobrino
Jessica Clarke
Tanmay Jagdale
Manish V Badarkhe
Saurabh Gorecha
Pali Rohár
Joanna Farley
Chris Kay