Commit Graph

25 Commits

Author SHA1 Message Date
Justin Chadwell b7f6525db6 Enable -Wshadow always
Variable shadowing is, according to the C standard, permitted and valid
behaviour. However, allowing a local variable to take the same name as a
global one can cause confusion and can make refactoring and bug hunting
more difficult.

This patch moves -Wshadow from WARNING2 into the general warning group
so it is always used. It also fixes all warnings that this introduces
by simply renaming the local variable to a new name

Change-Id: I6b71bdce6580c6e58b5e0b41e4704ab0aa38576e
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-11-19 08:53:16 -06:00
Marek Vasut df51d8fe7e rcar_gen3: plat: Rename RCAR_PRODUCT_* to PRR_PRODUCT_*
Rename RCAR_PRODUCT_* to PRR_PRODUCT_* and drop the duplicate
RCAR_PRODUCT_* macro.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I6b2789790b85edb79c026f0860d70f323d113d96
2019-08-16 15:15:12 +02:00
Marek Vasut 018358fc37 rcar_gen3: console: Convert to multi-console API
Convert the R-Car Gen3 platform and both SCIF and Log drivers
to multi-console API.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I18556973937d150b60453f9150d54ee612571e35
2019-06-14 00:16:55 +02:00
Valentine Barshak b709fe9c43 rcar_gen3: plat: Add R-Car V3M support
Add R-Car V3M support. This is based on the original
V3M support patch for Yocto v2.23.1 by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
---
Marek: Update on top of mainline ATF/master
2019-04-02 15:37:00 +02:00
Marek Vasut bfbf5df405 rcar_gen3: plat: Add initial D3 support
Add R-Car D3 SoC platform specifics. Driver, PFC, QoS, DDR init code
will be added separately.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-04-02 03:40:51 +02:00
Marek Vasut 5b4f022be4 rcar_gen3: plat: Print DRAM bank size in MiB if below 1 GiB
Print the DRAM bank size in MiB instead of GiB in case the bank size
is smaller than 1 GiB. This prevents printing zeroes on systems with
small DRAM sizes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-04-02 03:40:51 +02:00
Marek Vasut 5a21f31331 rcar_gen3: plat: Set M3W ULCB DRAM size to 2 GiB
The M3W ULCB board has 2 GiB of DRAM, set it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-03-27 00:16:30 +01:00
Marek Vasut 845d8fbb6e rcar_gen3: Add M3-W 3.0 support
Add support for the M3W 3.0 SoC and synchronize the upstream ATF with
Renesas downstream ATF release v2.0.1.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-03-04 13:29:32 +01:00
Marek Vasut 47141b7396 rcar_gen3: plat: Add generic timer init
Add code to determine the platform timer frequency and configure
the generic timer accordingly early in BL2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08 14:08:44 +01:00
Marek Vasut 3238542710 rcar_gen3: plat: Disable IPMMU PV0 cache on E3
Disable the IPMMU PV0 cache on E3 rev. 1.x .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08 14:08:44 +01:00
Marek Vasut 71430ed465 rcar_gen3: plat: Add E3 rev. 1.1 support
Add support for R-Car E3 silicon rev. 1.1

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08 14:08:44 +01:00
Marek Vasut 0468aa395b rcar_gen3: plat: Add missing platform auto-detection name
Add missing TARGET_NAME for the case where RCAR_LSI is set to AUTO,
which is platform auto-detection.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08 14:08:44 +01:00
Marek Vasut bc5fabd813 rcar_gen3: plat: Fix BL2 size check
Rename BL2_LIMIT to BL2_IMAGE_LIMIT and BL2_SYSRAM_LIMIT to BL2_LIMIT to
correctly set BL2_LIMIT value. Set correct DEVICE_SRAM_BASE to match the
hardware. Use BL2_END in rcar_configure_mmu_el3() to mark the cacheable
BL2 area.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08 14:08:44 +01:00
Marek Vasut db9a155508 rcar_gen3: plat: Function cleanup
Replace foo_t with struct foo.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08 14:08:44 +01:00
Antonio Nino Diaz 09d40e0e08 Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-04 10:43:17 +00:00
Marek Vasut a6de3db7bb plat: rcar: Generate FCNL reserved memory node
Generate a /reserved-memory node for FCNL in the DT passed to
subsequent stages, so they will know how the FCNL is configured.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 10:23:54 +01:00
Marek Vasut ac49c5fbe9 plat: rcar: Generate platform compatible string
Generate /compatible string for the platform, so that the subsequent
stages know which platform they are running on. This could be useful
when ie. building U-Boot that contains DTs for multiple platforms and
can thus decide on which platform it is running. This would ultimately
allow single bootloader binary for all Gen3 platforms.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 10:23:54 +01:00
Marek Vasut 1d85c4bd5b plat: rcar: Pass DTB with DRAM layout from BL2 to next stages
Pass DTB containing DRAM layout from BL2 to BL33 via register x3, so
that the BL33 can simply consume it and get accurate DRAM layout info.
BL33 is in most usecases U-Boot.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 10:23:54 +01:00
Marek Vasut 851851519d plat: rcar: Use array in the DRAM size reporting
Use array of start-size tuples for the DRAM banks and call single
function which iterates over this array to report the DRAM info.
This is in preparation for expanding this to generate FDT for the
next stage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 01:59:10 +01:00
Marek Vasut 10b7a4aeca plat: rcar: Print DRAM configuration after init
Print the DRAM configuration only after the DRAM was initialized. This
will be useful when deduplicating code populating FDT passed to U-Boot,
since it will contain the same macros as bl2_advertise_dram_size().

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 01:59:10 +01:00
Marek Vasut e1eddfea88 plat: rcar: Fill in memory information for M3W, M3N
Make the DRAM configuration debug print consistent for all supported SoCs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 01:59:10 +01:00
Marek Vasut 7bf24ae3c6 plat: rcar: Drop H3 v3.0 check on DRAM debug print
There is nothing preventing H3 older than v3.0 from printing the
DRAM configuration, just like v3.0 and newer. Drop the check and
let all H3 revisions print DRAM configuration in BL2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 01:59:10 +01:00
Marek Vasut 3b507aabd8 plat: rcar: Add E3 1GBx4 debug print
RCAR_DRAM_DDR3L_MEMCONF = 2 means E3 with 1GBx4 memory configuration.
Add debug print for this configuration for completeness sake.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 01:59:10 +01:00
Marek Vasut 358ed930f4 plat: rcar: Move DRAM layout print to separate function
Just move the DRAM layout information into separate function,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 01:59:10 +01:00
Jorge Ramirez-Ortiz 7e532c4bf7 rcar-gen3: initial commit for the rcar-gen3 boards
Reference code:
==============

rar_gen3: IPL and Secure Monitor Rev1.0.22
https://github.com/renesas-rcar/arm-trusted-firmware [rcar_gen3]

Author: Takuya Sakata <takuya.sakata.wz@bp.renesas.com>
Date:   Thu Aug 30 21:26:41 2018 +0900
	Update IPL and Secure Monitor Rev1.0.22

General Information:
===================

This port has been tested on the Salvator-X Soc_id r8a7795 revision
ES1.1 (uses an SPD).

Build Tested:
-------------
ATFW_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1"
MBEDTLS_DIR=$mbedtls

$ make clean bl2 bl31 rcar PLAT=rcar ${ATFW_OPT} SPD=opteed

Other dependencies:
------------------
* mbed_tls:
  git@github.com:ARMmbed/mbedtls.git [devel]

  Merge: 68dbc94 f34a4c1
  Author: Simon Butcher <simon.butcher@arm.com>
  Date:   Thu Aug 30 00:57:28 2018 +0100

* optee_os:
  https://github.com/BayLibre/optee_os

  Until it gets merged into OP-TEE, the port requires Renesas' Trusted
  Environment with a modification to support power management.

  Author: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
  Date:   Thu Aug 30 16:49:49 2018 +0200
    plat-rcar: cpu-suspend: handle the power level
    Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com>

* u-boot:
  The port has beent tested using mainline uboot.

  Author: Fabio Estevam <festevam@gmail.com>
  Date:   Tue Sep 4 10:23:12 2018 -0300

*linux:
  The port has beent tested using mainline kernel.

  Author: Linus Torvalds <torvalds@linux-foundation.org>
  Date:   Sun Sep 16 11:52:37 2018 -0700
      Linux 4.19-rc4

Overview
---------

BOOTROM starts the cpu at EL3; In this port BL2 will therefore be entered
at this exception level (the Renesas' ATF reference tree [1] resets into
EL1 before entering BL2 - see its bl2.ld.S)

BL2 initializes DDR (and i2c to talk to the PMIC on some platforms)
before determining the boot reason (cold or warm).

During suspend all CPUs are switched off and the DDR is put in
backup mode (some kind of self-refresh mode). This means that BL2 is
always entered in a cold boot scenario.

Once BL2 boots, it determines the boot reason, writes it to shared
memory (BOOT_KIND_BASE) together with the BL31 parameters
(PARAMS_BASE) and jumps to BL31.

To all effects, BL31 is as if it is being entered in reset mode since
it still needs to initialize the rest of the cores; this is the reason
behind using direct shared memory access to  BOOT_KIND_BASE and
PARAMS_BASE instead of using registers to get to those locations (see
el3_common_macros.S and bl31_entrypoint.S for the RESET_TO_BL31 use
case).

Depending on the boot reason BL31 initializes the rest of the cores:
in case of suspend, it uses a MBOX memory region to recover the
program counters.

[1] https://github.com/renesas-rcar/arm-trusted-firmware
Tests
-----

* cpuidle
  -------
   enable kernel's cpuidle arm_idle driver and boot

* system suspend
  --------------
  $ cat suspend.sh
    #!/bin/bash
    i2cset -f -y 7 0x30 0x20 0x0F
    read -p "Switch off SW23 and press return " foo
    echo mem > /sys/power/state

* cpu hotplug:
  ------------
  $ cat offline.sh
    #!/bin/bash
    nbr=$1
    echo 0 > /sys/devices/system/cpu/cpu$nbr/online
    printf "ONLINE:  " && cat /sys/devices/system/cpu/online
    printf "OFFLINE: " && cat /sys/devices/system/cpu/offline

  $ cat online.sh
    #!/bin/bash
    nbr=$1
    echo 1 > /sys/devices/system/cpu/cpu$nbr/online
    printf "ONLINE:  " && cat /sys/devices/system/cpu/online
    printf "OFFLINE: " && cat /sys/devices/system/cpu/offline

Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17 18:38:33 +02:00