Commit Graph

79 Commits

Author SHA1 Message Date
Madhukar Pappireddy 93b153b5bf Merge changes from topic "st_regulator" into integration
* changes:
  feat(st-sdmmc2): manage cards power cycle
  feat(stm32mp1): register fixed regulator
  feat(st-drivers): introduce fixed regulator driver
  refactor(st): update CPU and VDD voltage get
  refactor(stm32mp1-fdts): update regulator description
  refactor(st-pmic): use regulator framework for DDR init
  feat(st-pmic): register the PMIC to regulator framework
  refactor(st-pmic): split initialize_pmic()
  feat(stm32mp1): add regulator framework compilation
  feat(regulator): add a regulator framework
  feat(stpmic1): add new services
  feat(stpmic1): add USB OTG regulators
  refactor(st-pmic): improve driver usage
  refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean
  refactor(stm32mp1): re-order drivers init
2021-12-24 00:13:50 +01:00
Yann Gautier c39c658e75 refactor(st): update CPU and VDD voltage get
Use regulator framework to get CPU and VDD power supplies.

Change-Id: Ice745fb21ff10e71ef811e747165499c2e19253e
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-22 14:04:32 +01:00
Yann Gautier 33667d299b feat(st): use newly introduced clock framework
Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().

Change-Id: I15d2ce57b9499211fa522a1b53eeee9cf584c111
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
2021-12-22 13:08:09 +01:00
Yann Gautier acf28c267b feat(st): protect UART during platform init
Protect the UART instance used for serial boot
with UART used for console.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ieee1557b34e7baa81594c3fbf0513191737027bf
2021-12-14 11:34:16 +01:00
Yann Gautier aafff04354 feat(stm32mp1): update console management for SP_min
Use stm32mp_uart_console_setup() in SP_min setup.
Adapt the function stm32mp_uart_console_setup() for BL32 (no reset, add
CONSOLE_FLAG_RUNTIME under DEBUG.

Change-Id: Ib2d35c8d285dafb680aa218872ad679cbf43d0ed
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier 53612f7293 feat(plat/st): add a function to configure console
To ease console configuration, a dedicated function is created:
stm32mp_uart_console_setup(). The code will also be common for the
different BLs.

Change-Id: Idf3cad756f125ca2313cf30b1311637a9df8f27f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier a6bfa75cf2 feat(stm32mp1): add stm32_get_boot_interface function
Add function stm32_get_boot_interface to get the current boot interface
from information saved in the TAMP register.

Change-Id: I23af43c68eeaebe4c45920a57d739117aea3fbb1
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier 4dc77a35e3 refactor(stm32mp1): move stm32_save_boot_interface()
The function stm32_save_boot_interface()is moved to stm32mp1_private.c
file. The files stm32mp1_context.{c,h} are removed.
As return is always 0, change the function to return void.
Call it earlier, to be able to use it when configuring console.

Change-Id: I8986e1257dc8e8708eab044a51ea1f2426b16597
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-12-14 09:25:19 +01:00
Yann Gautier 737ad29bf9 feat(stm32_gpio): add a function to reset a pin
Add set_gpio_reset_cfg() to set a pin in its reset configuration:
analog, no-pull, speed low, and its secure configuration, thanks to
stm32_gpio_is_secure_at_reset().

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I7b73c3636859f97fcc57f81cf68b42efc727922e
2021-12-14 09:25:19 +01:00
Patrick Delaunay 9083fa11ea feat(plat/st): add STM32MP_UART_PROGRAMMER target
Handle boot from UART with STM32CubeProgammer based on mmap io
for STM32MP15.

Depends-On: Iba84e8dfd67b9f30416efb0f6778e48ba1f75dad
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ibd719dd46a11da78633728675ef6639635b6cf67
2021-12-03 09:26:11 +01:00
Patrick Delaunay fb3e7985c9 feat(plat/st): add STM32CubeProgrammer support on UART
Add a file to support the STMicroelectronics tool STM32CubeProgrammer
over UART in BL2 for STM32MP15x platform.

This tools is based on protocol defined in AN5275,
"USB DFU/USART protocols used in STM32MP1 Series bootloaders"
based on STM32 MCU protocols (AN3155, "USART protocol used
in the STM32 bootloader").

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I956c95d8de0a94d1eb8e61f043651dae7b838170
2021-12-03 09:26:11 +01:00
Yann Gautier 306dcd6b0d fix(plat/st): remove double space
Replace double space with single space in stm32cubeprogrammer_usb.c.

Change-Id: I717b136119e85fe8e25dd540758525f995200458
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-11-03 08:50:37 +01:00
Patrick Delaunay fa92fef0a0 feat(plat/st/stm32mp1): add STM32MP_USB_PROGRAMMER target
Add a support of USB as serial boot devices for STM32MP15x platform:
the FIP file is provide by STM32CubeProgrammer with the DFU protocol,
loaded in DDR at DWL_BUFFER_BASE address and then the io memmap is used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I272c17c458ff1e9d0780f8fa22330c8a35533d19
2021-10-29 16:44:03 +02:00
Patrick Delaunay afad5214a7 feat(plat/st): add STM32CubeProgrammer support on USB
Add a file to support over USB the STMicroelectronics tool
STM32CubeProgrammer in BL2 for STM32MP15x platform.

This tools is based on DFU stack.

Change-Id: I48a8f772cb0e9b8be24c06847f724f0470c0f917
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-10-29 16:43:49 +02:00
Patrick Delaunay efbd65fa7b feat(plat/st): add a USB DFU stack
Add a stack to support the Universal Serial Bus Device Class
Specification for Device Firmware Upgrade (USB DFU v1.1).

This stack is based on the USB device stack (USBD).

Change-Id: I8a56411d184882b6a9e3617c6dfb859086b8f353
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-10-29 16:43:36 +02:00
Mark Dykes 3deb060015 Merge changes from topic "st_dt_match_instance" into integration
* changes:
  refactor(stm32_sdmmc2): use DT helpers
  feat(plat/st): create new helper for DT access
2021-10-15 20:53:01 +02:00
Nicolas Le Bayon 8ce8918745 fix(plat/st): only check header major when booting
An STM32 image with the awaited header major version shouldn't be forbid
to boot. If the minor differs, then it means only non-mandatory options
have been added in the reserved fields, and the header remains backward
compatible.

Change-Id: Iff16b67f95c728e2f1d128bd1760a4be497c5ca3
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-06 11:09:21 +02:00
Yann Gautier ea97bbf6a0 feat(plat/st): create new helper for DT access
dt_match_instance_by_compatible() gives the DT node offset in DT
that matches both compatible and the peripheral instance address.

Change-Id: Ia85f4f4aa8fe8efd4df310d765e7586e67aa34c2
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-06 10:56:07 +02:00
Yann Gautier d5a84eeaac feat(plat/st): manage io_policies with FCONF
Introduced IO policies management through the trusted
boot firmware config device tree for UUID references.

Change-Id: Ibeeabede51b0514ebba26dbbdae587363b2aa0a7
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier 29332bcd68 feat(plat/st): use FCONF to configure platform
Add required code to support FCONF on STM32MP1 platform.
The new FW_CONFIG DT file will be inside the FIP, and loaded by BL2.
It will be used to configure the addresses where to load other binaries.
BL2 should be agnostic of which BL32 is in the FIP (OP-TEE or SP_min),
so optee_utils.c is always compiled, and some OP-TEE flags are removed.

Change-Id: Id957b49b0117864136250bfc416664f815043ada
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier 18b415be9d feat(plat/st): improve FIP image loading from MMC
Instead of using a scratch buffer of 512 bytes, we can directly use the
image address and max size. The mmc_block_dev_spec struct info is then
overwritten for each image with this info, except FW_CONFIG and GPT
table which will still use the scratch buffer.
This allows using multiple blocks read on MMC, and so improves the boot
time.
A cache invalidate is required for the remaining data not used from the
first and last blocks read. It is not required for FW_CONFIG_ID,
as it is in scratch buffer in SYSRAM, and also because bl_mem_params
struct is overwritten in this case. This should also not be done if
the image is not found (OP-TEE extra binaries when using SP_min).

Change-Id: If3ecfdfe35bb9db66284036ca49c4bd1be4fd121
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier 1d204ee4ab feat(plat/st): use FIP to load images
BL2 still uses the STM32 header binary format to be loaded from ROM code.
BL32 and BL33 and their respective device tree files are now put together
in a FIP file.
One DTB is created for each BL. To reduce their sizes, 2 new dtsi file are
in charge of removing useless nodes for a given BL. This is done because
BL2 and BL32 share the same device tree files base.

The previous way of booting is still available, the compilation flag
STM32MP_USE_STM32IMAGE has to be set to 1 in the make command. Some files
are duplicated and their names modified with _stm32_ to avoid too much
switches in the code.

Change-Id: I1ffada0af58486d4cf6044511b51e56b52269817
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-07 09:14:05 +02:00
Yann Gautier 7e87ba2598 feat(plat/st): add helper to save boot interface
Some parameters from BootROM boot context can be required after boot.
To save space in SYSRAM, this context can be overwritten during images
load sequence. The needed information (here the boot interface) is
then saved in a local variable.

Change-Id: I5e1ad4630ccf78480f415a0a83939005ae67729e
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-07-13 18:16:55 +02:00
Lionel Debieve 91ffc1deff fix(plat/st): improve DDR get size function
Avoid parsing device tree every time when returning
the DDR size.
A cache flush on this size is also added because TZC400 configuration
is applied at the end of BL2 after MMU and data cache being turned off.
Configuration needs to retrieve the DDR size to generate the correct
region. Access to the size fails because the value is still in the data
cache. Flushing the size is mandatory.

Change-Id: I3dd1958f37d806f9c15a5d4151968935f6fe642e
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-07-13 18:16:55 +02:00
Yann Gautier c1ad41fbf7 refactor(plat/st): map DDR secure at boot
In BL2, the DDR can be mapped as secured in MMU, as no other SW
has access to it during its execution.
The TZC400 configuration is also updated to reflect this. When using
OP-TEE, the TZC400 is reconfigured at the end of BL2, to match OP-TEE
mapping. Else, SP_min will be in charge to reconfigure TZC400 to set
DDR non-secure.

Change-Id: Ic5ec614b218f733796feeab1cdc425d28cc7c103
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-07-13 18:16:55 +02:00
Patrick Delaunay c25ff16ecf refactor(plat/st): add stm32image_io_setup
Add a generic function to setup the stm32image IO.

Change-Id: I0f7cf4a6030605037643f3119b809e0319d926af
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-06-30 17:07:10 +02:00
Yann Gautier 71693a6634 fix(plat/st): panic if boot interface is wrong
Add a panic() at the end of stm32mp_io_setup() if the boot interface
given in ROM code boot context is not supported.

Change-Id: I0d50f21a11231febd21041b6e63108cc3e6f4f0c
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-06-30 17:04:22 +02:00
Manish Pandey 5d582ff936 Merge "refactor(plat/st): avoid fixed DT address" into integration 2021-06-16 23:23:30 +02:00
Manish Pandey 2a0087796f Merge changes from topic "soc_id" into integration
* changes:
  refactor(plat/nvidia): use SOC_ID defines
  refactor(plat/mediatek): use SOC_ID defines
  refactor(plat/arm): use SOC_ID defines
  feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID
  refactor(plat/st): export functions to get SoC information
  feat(smccc): add bit definition for SMCCC_ARCH_SOC_ID
2021-06-16 12:03:17 +02:00
Yann Gautier c20b060661 refactor(plat/st): avoid fixed DT address
Device Tree address is now a parameter for dt_open_and_check() function.
This will allow better flexibility when introducing PIE and FIP.
The fdt pointer is now only assigned if the given address holds
a valid device tree file. This allows removing the fdt_checked variable,
as we now check fdt is not null.

Change-Id: I04cbb2fc05c9c711ae1c77d56368dbeb6dd4b01a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-06-04 15:05:05 +02:00
Vyacheslav Yurkov 214c8a8d08 feat(plat/st): add STM32MP_EMMC_BOOT option
Added a new STM32MP_EMMC_BOOT option, which is used to look for SSBL in
the same eMMC boot partition TF-A booted from at a fixed 256k offset. In
case STM32 image header is not found, the boot process rolls back to a
GPT partition look-up scheme.

Signed-off-by: Vyacheslav Yurkov <uvv.mail@gmail.com>
Change-Id: I85a87dc9ae7f2b915ed8e584be80f4b3588efc48
2021-06-04 10:10:51 +02:00
Yann Gautier 3f916a412a refactor(plat/st): remove io_dummy code for OP-TEE
The io_dummy code and function calls are only used in case BL32 is TF-A
SP_min, and not OP-TEE. This code in bl2_io_storage can then be put under
#ifndef AARCH32_SP_OPTEE.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I52787a775160b335f97547203f653419621f5147
2021-06-03 10:48:57 +02:00
Yann Gautier e1db570a30 refactor(plat/st): remove BL2 image loading
STM32MP1 does not use BL1, the loading of BL2 is done by ROM code. It is
then useless to have an entry BL2_IMAGE_ID in the policies.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I464cedf588114d60522433123f8dbef32ae36818
2021-06-03 10:45:17 +02:00
Yann Gautier 06c3b100ea refactor(plat/st): rename OP-TEE pager to core
OPTEE_PAGER defines are renamed OPTEE_CORE.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I4c28d3b0a6ed843088a3ef06e3e348ce689fabde
2021-06-03 10:43:42 +02:00
Yann Gautier 3d201787e8 feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID
The JEDEC information for STMicroelectronics is:
JEDEC_ST_MFID U(0x20)
JEDEC_ST_BKID U(0x0)
And rely on platform functions to get chip IP and revision.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I4fa4ac8bb5583b1871b768decc9fe08e8966ff54
2021-05-27 09:54:59 +02:00
Yann Gautier 92661e01cf refactor(plat/st): export functions to get SoC information
Three functions are exported to get SoC version, SoC device ID, and SoC
name. Those functions are based on reworked existing static functions.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I1f3949062bb488286a9e7a38ffcd1457953dac56
2021-05-27 09:54:59 +02:00
Yann Gautier f714ca80b8 plat/st: do not rely on tainted value for dt property length
To compare the "okay" string of a property, strncmp is used but with the
length given by fdt_getprop. This len value is reported as tainted by
Coverity [1]. We just can use strlen("okay") which is a known value
to compare the 2 strings.

 [1] https://scan4.coverity.com/reports.htm#v51972/p11439/fileInstanceId=96515154&defectInstanceId=14219121&mergedDefectId=342997

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ic8fb6ccf3126a37df615e433eb028861812015da
2021-04-29 17:57:47 +02:00
Yann Gautier cddf1bd765 plat/st: do not keep mmc_device_info in stack
Create a dedicated static struct mmc_device_info mmc_info mmc_info
instead of having this in stack.
A boot issue has been seen on some platform when applying patch [1].

 [1] 13f3c5166f ("mmc:prevent accessing to the released space in case of wrong usage")

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I73a079715253699d903721c865d6470d58f6bd30
2021-04-08 08:44:57 +02:00
Yann Gautier ade9ce03b8 stm32mp1: get peripheral base address from a define
Retrieve peripheral base address from a define instead of
parsing the device tree. The goal is to improve execution time.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I2588c53ad3d4abcc3d7fe156458434a7940dd72b
2020-10-13 11:27:40 +02:00
Etienne Carriere ec8f4212ac stm32mp1: register shared resource per GPIO bank/pin
Introduce helper functions stm32mp_register_secure_gpio() and
stm32mp_register_non_secure_gpio() for drivers to register a
GPIO pin as secure or non-secure.

These functions are stubbed when shared resource driver is not
embedded in the BL image so that drivers do not bother whether they
shall register or not their resources.

Change-Id: I1fe98576c072ae31f75427c9ac5c9f6c4f1b6ed1
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2020-07-08 12:56:09 +02:00
Etienne Carriere 0651b5b77a stm32mp1: register shared resource per IOMEM address
Introduce helper functions stm32mp_register_secure_periph_iomem()
and stm32mp_register_non_secure_periph_iomem() for drivers to
register a resource as secure or non-secure based on its SoC
interface registers base address.

These functions are stubbed when shared resources driver is not
embedded (!STM32MP_SHARED_RESOURCES) so that drivers embedded
in other BL stages do not bother whether they shall register or
not their resources.

Change-Id: Icebd05a930afc5964bc4677357da5d1b23666066
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2020-07-08 12:56:06 +02:00
Etienne Carriere 68450c9437 stm32mp1: shared resources: peripheral registering
Define helper functions stm32mp_register_secure_periph() and
stm32mp_register_non_secure_periph() for platform drivers to
register a shared resource assigned to respectively secure
or non-secure world.

Some resources are related to clock resources. When a resource is
registered as secure, ensure its clock dependencies are also
registered as secure. Registering a non-secure resource does not
mandate its clock dependencies are also registered as non-secure.

Change-Id: I74975be8976b8d3bf18dcc807541a072803af6e3
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2020-07-08 12:55:59 +02:00
Etienne Carriere 5f038ac683 stm32mp1: shared resources: apply registered configuration
BL32/SP_MIN configures platform security hardening from the shared
resources driver.  At the end of SP_MIN initialization, all shared
resources shall be assigned to secure or non-secure world by
drivers. A lock prevent from further change on the resource
assignation. By definition, resources not registered are assign
to non-secure world since not claimed by any component on the BL.

No functional change as all resources are currently in state
SHRES_UNREGISTERED hence assigned to non-secure world as prior
this change in stm32mp1_etzpc_early_setup() and
sp_min_platform_setup().

Change-Id: Ic41fab47216c3b8b7a6a75b8358cfcec411ed941
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2020-06-23 09:17:45 +02:00
Etienne Carriere 47cf5d3f28 stm32mp1: introduce shared resources support
STM32MP1 SoC includes peripheral interfaces that can be assigned to
the secure world, or that can be opened to the non-secure world.

This change introduces the basics of a driver that manages such
resources which assignation is done at run time. It currently offers
API functions that state whether a service exposed to non-secure
world has permission to access a targeted clock or reset controller.

Change-Id: Iff20028f41586bc501085488c03546ffe31046d8
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2020-06-23 09:16:48 +02:00
Etienne Carriere ccc199edda plat/stm32mp1: fdt helpers for secure aware gpio bank
New helper functions to get GPIO banks configuration from the FDT.

stm32_get_gpio_bank_pinctrl_node() allows stm32mp platforms to
differentiate specific GPIO banks when these are defined with a specific
path in the FDT.

fdt_get_gpio_bank_pin_count() returns the number of pins in a GPIO bank
as it depends on the SoC variant.

Change-Id: I4481774152b3c6bf35bf986f58e357c2f9c19176
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2020-05-11 14:30:03 +02:00
Etienne Carriere c0ea3b1b79 plat/st: move GPIO bank helper function to platform source files
Relation between GPIO banks and their base address and offset address
if platform dependent. This change moves helper functions
stm32_get_gpio_bank_base() and stm32_get_gpio_bank_offset() from
plat/st/common to plat/st/stm32mp1/.

Change-Id: Id3d03e585746aa5509c6fab7d88183a92d561e3f
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2020-05-11 14:20:58 +02:00
Andre Przywara 7a61114da6 plat/stm32: Use generic fdt_get_stdout_node_offset()
Now that we have an implementation for getting the node offset of the
stdout-path property in the generic fdt_wrappers code, use that to
replace the current ST platform specific implementation.

Change-Id: I5dd05684e7ca3cb563b5f71c885e1066393e057e
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-05-05 15:36:51 +01:00
Andre Przywara 7ad6d36201 plat/stm32: Use generic fdt_get_reg_props_by_name()
The STM32 platform port parse DT nodes to find base address to
peripherals. It does this by using its own implementation, even though
this functionality is generic and actually widely useful outside of the
STM32 code.

Re-implement fdt_get_reg_props_by_name() on top of the newly introduced
fdt_get_reg_props_by_index() function, and move it to fdt_wrapper.c.
This is removes the assumption that #address-cells and #size-cells are
always one.

Change-Id: I6d584930262c732b6e0356d98aea50b2654f789d
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-05-05 15:36:51 +01:00
Andre Przywara be858cffa9 plat/stm32: Implement fdt_read_uint32_default() as a wrapper
The STM32 platform code uses its own set of FDT helper functions,
although some of them are fairly generic.

Remove the implementation of fdt_read_uint32_default() and implement it
on top of the newly introduced fdt_read_uint32() function, then convert
all users over.

This also fixes two callers, which were slightly abusing the "default"
semantic.

Change-Id: I570533362b4846e58dd797a92347de3e0e5abb75
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-04-29 10:19:17 +01:00
Andre Przywara 52a616b48c plat/stm32: Use generic fdt_read_uint32_array() implementation
The device tree parsing code for the STM32 platform is using its own FDT
helper functions, some of them being rather generic.
In particular the existing fdt_read_uint32_array() implementation is now
almost identical to the new generic code in fdt_wrappers.c, so we can
remove the ST specific version and adjust the existing callers.

Compared to the original ST implementation the new version takes a
pointer to the DTB as the first argument, and also swaps the order of
the number of cells and the pointer.

Change-Id: Id06b0f1ba4db1ad1f733be40e82c34f46638551a
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-04-28 15:56:31 +01:00