Commit Graph

6 Commits

Author SHA1 Message Date
Pankaj Gupta f359a38224 nxp lx2160a-aqds: new plat based on soc lx2160a
New NXP platform lx2160a-qds:
- Based SoC lx2160a
- Board specific tuning for DDR init.
- Board specific Flash details.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I500ddbe9e56c4af5f955da6ecbd4ddc5fbe89a12
2021-03-24 09:49:32 +05:30
Pankaj Gupta eb2b193d75 NXP lx2160a-rdb: new plat based on SoC lx2160a
New NXP platform lx2160a-rdb(Reference Design Board):
- Based SoC lx2160a
- Board specific tuning for DDR init.
- Board specific Flash details.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I9c10dac9d5e67d44a2d94a7a27812220fdcc6ae3
2021-03-24 09:49:32 +05:30
Pankaj Gupta 1f49730869 nxp lx2162aqds: new plat based on soc lx2160a
New NXP platform lx2162aqds:
- Based SoC lx2160a
- Board specific tuning for DDR init.
- Board specific Flash details.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I53bfff85398313082db77c77625cb2d40cd9b1b1
2021-03-24 09:49:32 +05:30
Pankaj Gupta 9877084b2c nxp: errata handling at soc level for lx2160a
SoC erratas are handled as part of this commit.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I06f7594d19cc7fc89fe036a8a255300458cb36dd
2021-03-24 09:49:32 +05:30
Pankaj Gupta 18498657f0 nxp: make file for loading additional ddr image
- NXP SoC lx2160a needs additional ddr_fip.bin.

- There are three types of ddr image that can be created:
  -- ddr_fip.mk for creating fip_ddr.bin image for normal boot.
  -- ddr_fip_sb.mk for creating fip_ddr_sec.bin image for NXP CSF based
     CoT/secure boot.
  -- ddr_fip_tbbr.mk for creating fip_ddr_sec.bin image for MBEDTLS
     CoT/secure boot.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I24bff8d489f72da99f64cb79b2114faa9423ce8c
2021-03-24 09:49:32 +05:30
Pankaj Gupta 87056d3193 nxp: adding support of soc lx2160a
* NXP SoC is 16 A-72 core SoC.
* SoC specific defines are defined in:
  - soc.def
  - soc.h
* Called for BL2 and BL31 setup, SoC specific setup are implemented in:
  - soc.c
* platform specific helper functions implemented at:
  - aarch64/lx2160a_helpers.S
* platform specific functions used by 'plat/nxp/commpon/psci',
  etc. are implemented at:
  - aarch64/lx2160a.S
* platform specific implementation for handling PSCI_SYSTEM_RESET2:
  - aarch64/lx2160a_warm_rst.S

Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Ib40086f9d9079ed9b22967baff518c6df9f408b8
2021-03-24 09:49:32 +05:30