Pali Rohár c0a909cdcc fix(drivers/marvell/comphy-cp110): fix error code in pcie power on ... Function polling_with_timeout() returns last value from polled register on failure and zero on success. So set "ret" variable to error code -ETIMEDOUT on error like it is done in other functions. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I16cac81bbcbe2113e139722dc0e8fc2b85428d1b		2021-09-29 22:25:46 +02:00
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comphy	fix(drivers/marvell/comphy-cp110): fix error code in pcie power on	2021-09-29 22:25:46 +02:00
mc_trustzone	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
mg_conf_cm3	drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW	2020-07-10 10:55:09 +00:00
mochi	drivers/marvell: check if TRNG unit is present	2021-04-20 13:00:16 +02:00
secure_dfx_access	drivers: marvell: misc-dfx: extend dfx whitelist	2021-04-20 12:59:45 +02:00
uart	fix(plat/marvell/a3720/uart): fix configuring UART clock	2021-06-01 16:32:10 +02:00
amb_adec.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
ap807_clocks_init.c	ble: ap807: improve PLL configuration sequence	2020-06-07 00:06:03 +02:00
cache_llc.c	drivers: marvell: Fix the LLC SRAM driver	2020-07-10 10:55:33 +00:00
ccu.c	plat: marvell: armada: add ccu window for workaround errata-id 3033912	2020-10-04 15:23:29 +02:00
comphy.h	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
ddr_phy_access.c	ddr_phy: use smc calls to access ddr phy registers	2021-04-20 12:59:34 +02:00
ddr_phy_access.h	ddr_phy: use smc calls to access ddr phy registers	2021-04-20 12:59:34 +02:00
gwin.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
io_win.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
iob.c	marvell: drivers: move XOR0/1 DIOB from WIN 0 to 1	2021-02-11 09:43:18 +00:00
mci.c	plat: marvell: mci: perform mci link tuning for all mci interfaces	2020-06-07 00:06:03 +02:00
thermal.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00