Varun Wadekar 0cd6138ddc Tegra: enable processor retention and L2/CPUECTLR access ... This patch enables the processor retention and L2/CPUECTLR read/write access from the NS world only for Cortex-A57 CPUs on the Tegra SoCs. Change-Id: I9941a67686ea149cb95d80716fa1d03645325445 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>		2017-02-21 18:55:58 -08:00
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t132	Tegra: define MAX_XLAT_TABLES and MAX_MMAP_REGIONS per-platform	2017-02-21 18:55:58 -08:00
t210	Tegra: enable processor retention and L2/CPUECTLR access	2017-02-21 18:55:58 -08:00