Alexei Fedorov f3ccf036ec TF-A AMU extension: fix detection of group 1 counters. ... This patch fixes the bug when AMUv1 group1 counters was always assumed being implemented without checking for its presence which was causing exception otherwise. The AMU extension code was also modified as listed below: - Added detection of AMUv1 for ARMv8.6 - 'PLAT_AMU_GROUP1_NR_COUNTERS' build option is removed and number of group1 counters 'AMU_GROUP1_NR_COUNTERS' is now calculated based on 'AMU_GROUP1_COUNTERS_MASK' value - Added bit fields definitions and access functions for AMCFGR_EL0/AMCFGR and AMCGCR_EL0/AMCGCR registers - Unification of amu.c Aarch64 and Aarch32 source files - Bug fixes and TF-A coding style compliant changes. Change-Id: I14e407be62c3026ebc674ec7045e240ccb71e1fb Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>		2020-08-10 10:40:53 +00:00
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arch.h	TF-A AMU extension: fix detection of group 1 counters.	2020-08-10 10:40:53 +00:00
arch_features.h	drivers: generic_delay_timer: Assert presence of Generic Timer	2019-02-06 09:54:42 +00:00
arch_helpers.h	TF-A AMU extension: fix detection of group 1 counters.	2020-08-10 10:40:53 +00:00
asm_macros.S	Use Speculation Barrier instruction for v8.5 cores	2020-03-11 11:11:05 -05:00
assert_macros.S	Reorganize architecture-dependent header files	2019-01-04 10:43:16 +00:00
console_macros.S	console: update skeleton	2019-07-16 13:01:02 +00:00
el3_common_macros.S	el3_entrypoint_common: avoid overwriting arg3	2020-02-21 15:32:38 +01:00
smccc_helpers.h	Changes to support updated register usage in SMCCC v1.2	2019-11-26 12:56:30 -06:00
smccc_macros.S	aarch32: stop speculative execution past exception returns	2020-03-01 06:44:30 -06:00