Caesar Wang 2831bc3a5f rockchip: add support save/restore configuration for DDR during enter S3 ... This patch intend to support save the registers of the DDR controller and PHY before suspend, and restore them after resume. Change-Id: Ia10b476c0b837628ac0f365416a7118292753e96 Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Derek Basehore <dbasehore@chromium.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com>		2016-10-27 07:14:26 +08:00
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arm	Introduce ARM SiP service	2016-10-12 15:36:45 +01:00
common	AArch32: Common changes needed for BL1/BL2	2016-09-21 16:27:15 +01:00
compat	AArch32: Add essential ARM platform and FVP support	2016-08-10 18:01:38 +01:00
mediatek	Remove MT6795 plat_sip_svc.c to fix Coverity analysis error.	2016-09-19 14:20:42 +08:00
nvidia/tegra	Migrate platform makefile to new console driver location	2016-08-09 17:33:57 +01:00
qemu	Migrate platform makefile to new console driver location	2016-08-09 17:33:57 +01:00
rockchip	rockchip: add support save/restore configuration for DDR during enter S3	2016-10-27 07:14:26 +08:00
xilinx/zynqmp	zynqmp: Make MMIO write FW call synchronous	2016-09-13 09:19:03 -07:00