322b00fcfb
When entering C7, ATF disables caches and flushes the L1 cache. However, wake_time[cpu] can still remain in the L2 cache, causing later reads to it to fetch from DRAM. This will read stale values. Fix this by aligning wake_time[cpu] to cache lines, and explicitly cleaning it before disabling caches. Change-Id: Id73d095b479677595a6b3dd0abb240a1fef5f311 Signed-off-by: Mustafa Yigit Bilgen <mbilgen@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> |
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| arm | ||
| common | ||
| compat | ||
| mediatek | ||
| nvidia/tegra | ||
| qemu | ||
| rockchip | ||
| xilinx/zynqmp | ||