Abhyuday Godhasara 93d4625627 fix(plat/xilinx/versal): resolve misra R10.6 ... MISRA Violation: MISRA-C:2012 R.10.6 - The value of a composite expression shall not be assigned to an object with wider essential type Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> Change-Id: Ia0d13c3cfeb13d22b6fc7e8869cc713218302973		2021-11-30 02:00:01 -08:00
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aarch64	xilinx: versal: PLM to ATF handover	2020-01-23 03:01:22 -07:00
include	fix(plat/xilinx/versal): resolve misra R10.3	2021-11-30 02:00:01 -08:00
pm_service	fix(plat/xilinx/versal): resolve misra R10.1 in pm services	2021-11-30 02:00:01 -08:00
bl31_versal_setup.c	fix(plat/xilinx/versal): resolve misra R10.6	2021-11-30 02:00:01 -08:00
plat_psci.c	fix(plat/xilinx/versal): resolve misra R14.4	2021-11-30 02:00:01 -08:00
plat_topology.c	arm64: versal: Add support for new Xilinx Versal ACAPs	2018-11-09 15:06:53 +05:30
plat_versal.c	fix(plat/xilinx/versal): resolve misra R14.4	2021-11-30 02:00:01 -08:00
platform.mk	feat(plat/versal): add support for SLS mitigation	2021-07-20 22:33:47 -06:00
sip_svc_setup.c	fix(plat/xilinx/versal): resolve misra R17.7	2021-11-30 02:00:01 -08:00
versal_gicv3.c	plat: xilinx: versal: Move versal_private.h to include directory	2020-01-15 11:01:28 -08:00
versal_ipi.c	fix(plat/xilinx/versal): resolve misra R7.2	2021-11-30 02:00:01 -08:00