Caesar Wang 4ea8dc4e02 rockchip: fix A72 L2CTLR_DATA_RAM_LATENCY to 5 ... The default value of L2CTLR_DATA_RAM_LATENCY is 2, depends to the test result on rk3399, the A72 will need lower voltage for high frequency if it's set to be 5, and almost no effect on performance. Change-Id: I99a6a43edcc0c58f7775c10f4b85669dc3eff66d Signed-off-by: Caesar Wang <wxt@rock-chips.com>		2016-10-25 03:32:31 +08:00
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common	rockchip: fix A72 L2CTLR_DATA_RAM_LATENCY to 5	2016-10-25 03:32:31 +08:00
rk3368	Migrate platform makefile to new console driver location	2016-08-09 17:33:57 +01:00
rk3399	rockchip: fixes the clock select and divide register for rk3399	2016-09-29 00:51:19 +08:00