arm-trusted-firmware/plat/arm
John Tsichritzis 63cc265886 Add cache flush after BL1 writes heap info to DTB
A cache flush is added in BL1, in Mbed TLS shared heap code. Thus, we
ensure that the heap info written to the DTB always gets written back to
memory.  Hence, sharing this info with other images is guaranteed.

Change-Id: I0faada31fe7a83854cd5e2cf277ba519e3f050d5
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
2018-09-07 11:45:55 +01:00
..
board Merge pull request #1554 from jts-arm/mbed 2018-09-05 12:19:03 +01:00
common Add cache flush after BL1 writes heap info to DTB 2018-09-07 11:45:55 +01:00
css Support shared Mbed TLS heap for SGM 2018-09-04 10:33:08 +01:00
soc/common Fix MISRA rule 8.4 Part 2 2018-02-28 17:19:56 +00:00