Chris Kay 68120783d6 feat(mpmm): add support for MPMM ... MPMM - the Maximum Power Mitigation Mechanism - is an optional microarchitectural feature present on some Armv9-A cores, introduced with the Cortex-X2, Cortex-A710 and Cortex-A510 cores. MPMM allows the SoC firmware to detect and limit high activity events to assist in SoC processor power domain dynamic power budgeting and limit the triggering of whole-rail (i.e. clock chopping) responses to overcurrent conditions. This feature is enabled via the `ENABLE_MPMM` build option. Configuration can be done via FCONF by enabling `ENABLE_MPMM_FCONF`, or by via the plaform-implemented `plat_mpmm_topology` function. Change-Id: I77da82808ad4744ece8263f0bf215c5a091c3167 Signed-off-by: Chris Kay <chris.kay@arm.com>		2021-10-26 12:15:42 +01:00
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fconf.c	lib/fconf: Update data type of config max size	2020-07-23 02:11:05 +00:00
fconf.mk	feat(mpmm): add support for MPMM	2021-10-26 12:15:42 +01:00
fconf_amu_getter.c	feat(amu): enable per-core AMU auxiliary counters	2021-10-26 12:15:33 +01:00
fconf_cot_getter.c	lib: fconf: Implement a parser to populate CoT	2020-09-15 16:13:26 +01:00
fconf_dyn_cfg_getter.c	lib/fconf: Update 'set_fw_config_info' function	2020-07-23 02:11:13 +00:00
fconf_mpmm_getter.c	feat(mpmm): add support for MPMM	2021-10-26 12:15:42 +01:00
fconf_tbbr_getter.c	refactor(measured_boot): remove passing of BL2 hash via device tree	2021-10-12 17:53:47 +01:00