Andre Przywara b75dc0e41c Add workaround for ARM Cortex-A53 erratum 855873 ... ARM erratum 855873 applies to all Cortex-A53 CPUs. The recommended workaround is to promote "data cache clean" instructions to "data cache clean and invalidate" instructions. For core revisions of r0p3 and later this can be done by setting a bit in the CPUACTLR_EL1 register, so that hardware takes care of the promotion. As CPUACTLR_EL1 is both IMPLEMENTATION DEFINED and can be trapped to EL3, we set the bit in firmware. Also we dump this register upon crashing to provide more debug information. Enable the workaround for the Juno boards. Change-Id: I3840114291958a406574ab6c49b01a9d9847fec8 Signed-off-by: Andre Przywara <andre.przywara@arm.com>		2017-03-20 10:57:46 +00:00
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bl1	FWU: Add Generic Firmware Update framework support in BL1	2015-12-09 17:41:18 +00:00
bl31	Introduce PSCI Library Interface	2016-07-19 10:19:01 +01:00
bl32	Resolve build errors flagged by GCC 6.2	2017-01-26 13:47:37 +00:00
common	Merge pull request #841 from dp-arm/dp/debug-regs	2017-02-20 13:58:48 +00:00
drivers	drivers: add designware emmc driver	2017-01-23 22:08:45 +08:00
lib	Add workaround for ARM Cortex-A53 erratum 855873	2017-03-20 10:57:46 +00:00
plat	Merge pull request #861 from soby-mathew/sm/aarch32_fixes	2017-03-18 12:16:27 +00:00
services	PSCI: Do psci_setup() as part of std_svc_setup()	2016-09-22 17:07:20 +01:00