Caesar Wang 8382e17c4c rockchip: add M0 source code and build system for RK3399 ... This CL supports add M0 source code to built into the bl31.bin, the goal is that we can load the M0 code binary into SRAM and execute it. We need the M0 help us to clean the power_mode_en bit during the AP PMU enter the state machine with interrupt, and avoid to the AP can not exit the loop forever. Change-Id: I844582c54a1f0d44ca41290d44618df58679f341 Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Patrick Georgi <pgeorgi@google.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>		2016-10-25 03:29:42 +08:00
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arm	Merge pull request #717 from sandrine-bailleux-arm/sb/foundation-fvp-v10	2016-09-26 10:20:08 +01:00
common	AArch32: Common changes needed for BL1/BL2	2016-09-21 16:27:15 +01:00
compat	AArch32: Add essential ARM platform and FVP support	2016-08-10 18:01:38 +01:00
mediatek	Remove MT6795 plat_sip_svc.c to fix Coverity analysis error.	2016-09-19 14:20:42 +08:00
nvidia/tegra	Migrate platform makefile to new console driver location	2016-08-09 17:33:57 +01:00
qemu	Migrate platform makefile to new console driver location	2016-08-09 17:33:57 +01:00
rockchip	rockchip: add M0 source code and build system for RK3399	2016-10-25 03:29:42 +08:00
xilinx/zynqmp	zynqmp: Make MMIO write FW call synchronous	2016-09-13 09:19:03 -07:00