arm-trusted-firmware/plat
Antonio Nino Diaz 883d1b5d4a Add comments about mismatched TCR_ELx and xlat tables
When the MMU is enabled and the translation tables are mapped, data
read/writes to the translation tables are made using the attributes
specified in the translation tables themselves. However, the MMU
performs table walks with the attributes specified in TCR_ELx. They are
completely independent, so special care has to be taken to make sure
that they are the same.

This has to be done manually because it is not practical to have a test
in the code. Such a test would need to know the virtual memory region
that contains the translation tables and check that for all of the
tables the attributes match the ones in TCR_ELx. As the tables may not
even be mapped at all, this isn't a test that can be made generic.

The flags used by enable_mmu_xxx() have been moved to the same header
where the functions are.

Also, some comments in the linker scripts related to the translation
tables have been fixed.

Change-Id: I1754768bffdae75f53561b1c4a5baf043b45a304
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-02-27 09:55:01 +00:00
..
arm ARM Platforms: Add CASSERT for BL2_BASE 2018-02-22 15:19:03 +00:00
common qemu: Fix interrupt type check 2018-02-09 20:49:57 +02:00
compat Do not enable SVE on pre-v8.2 platforms 2017-11-30 17:45:23 +00:00
hisilicon Merge pull request #1259 from hzhuang1/fix_uart 2018-02-17 21:55:57 +00:00
mediatek Add comments about mismatched TCR_ELx and xlat tables 2018-02-27 09:55:01 +00:00
nvidia/tegra tegra: Fix mmap_region_t struct mismatch 2018-02-17 06:15:35 +01:00
qemu qemu: Fix interrupt type check 2018-02-09 20:49:57 +02:00
rockchip Ensure the correct execution of TLBI instructions 2018-02-21 13:54:55 +00:00
rpi3 Disable workaround for CVE-2017-5715 on unaffected platforms 2018-01-29 09:58:56 +00:00
socionext/uniphier Merge pull request #1224 from masahir0y/gzip 2018-02-06 05:12:28 +00:00
xilinx/zynqmp Disable workaround for CVE-2017-5715 on unaffected platforms 2018-01-29 09:58:56 +00:00