279 lines
9.8 KiB
ReStructuredText
279 lines
9.8 KiB
ReStructuredText
TF-A Build Instructions for Marvell Platforms
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=============================================
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This section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms.
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Build Instructions
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------------------
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(1) Set the cross compiler
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.. code:: shell
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> export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu-
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(2) Set path for FIP images:
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Set U-Boot image path (relatively to TF-A root or absolute path)
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.. code:: shell
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> export BL33=path/to/u-boot.bin
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For example: if U-Boot project (and its images) is located at ``~/project/u-boot``,
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BL33 should be ``~/project/u-boot/u-boot.bin``
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.. note::
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*u-boot.bin* should be used and not *u-boot-spl.bin*
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Set MSS/SCP image path (mandatory only for A7K/8K/CN913x)
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.. code:: shell
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> export SCP_BL2=path/to/mrvl_scp_bl2*.img
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(3) Armada-37x0 build requires WTP tools installation.
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See below in the section "Tools and external components installation".
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Install ARM 32-bit cross compiler, which is required for building WTMI image for CM3
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.. code:: shell
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> sudo apt-get install gcc-arm-linux-gnueabi
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(4) Clean previous build residuals (if any)
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.. code:: shell
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> make distclean
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(5) Build TF-A
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There are several build options:
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- DEBUG
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Default is without debug information (=0). in order to enable it use ``DEBUG=1``.
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Must be disabled when building UART recovery images due to current console driver
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implementation that is not compatible with Xmodem protocol used for boot image download.
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- LOG_LEVEL
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Defines the level of logging which will be purged to the default output port.
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LOG_LEVEL_NONE 0
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LOG_LEVEL_ERROR 10
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LOG_LEVEL_NOTICE 20
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LOG_LEVEL_WARNING 30
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LOG_LEVEL_INFO 40
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LOG_LEVEL_VERBOSE 50
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- USE_COHERENT_MEM
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This flag determines whether to include the coherent memory region in the
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BL memory map or not.
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- LLC_ENABLE
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Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``).
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- LLC_SRAM
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Flag enabling the LLC (L3) cache SRAM support. The LLC SRAM is activated and used
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by Trusted OS (OP-TEE OS, BL32). The TF-A only prepares CCU address translation windows
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for SRAM address range at BL31 execution stage with window target set to DRAM-0.
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When Trusted OS activates LLC SRAM, the CCU window target is changed to SRAM.
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There is no reason to enable this feature if OP-TEE OS built with CFG_WITH_PAGER=n.
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Only set LLC_SRAM=1 if OP-TEE OS is built with CFG_WITH_PAGER=y.
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- MARVELL_SECURE_BOOT
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Build trusted(=1)/non trusted(=0) image, default is non trusted.
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- BLE_PATH
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Points to BLE (Binary ROM extension) sources folder.
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Only required for A7K/8K/CN913x builds.
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The parameter is optional, its default value is ``plat/marvell/armada/a8k/common/ble``.
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- MV_DDR_PATH
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For A7K/8K/CN913x, use this parameter to point to mv_ddr driver sources to allow BLE build. For A37x0,
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it is used for ddr_tool build.
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Usage example: MV_DDR_PATH=path/to/mv_ddr
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The parameter is optional for A7K/8K/CN913x, when this parameter is not set, the mv_ddr
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sources are expected to be located at: drivers/marvell/mv_ddr. However, the parameter
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is necessary for A37x0.
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For the mv_ddr source location, check the section "Tools and external components installation"
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- CP_NUM
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Total amount of CPs (South Bridge) connected to AP. When the parameter is omitted,
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the build uses the default number of CPs, which is a number of embedded CPs inside the
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package: 1 or 2 depending on the SoC used. The parameter is valid for OcteonTX2 CN913x SoC
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family (PLAT=t9130), which can have external CPs connected to the MCI ports. Valid
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values with CP_NUM are in a range of 1 to 3.
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- DDR_TOPOLOGY
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For Armada37x0 only, the DDR topology map index/name, default is 0.
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Supported Options:
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- DDR3 1CS (0): DB-88F3720-DDR3-Modular (512MB); EspressoBIN (512MB)
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- DDR4 1CS (1): DB-88F3720-DDR4-Modular (512MB)
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- DDR3 2CS (2): EspressoBIN V3-V5 (1GB 2CS)
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- DDR4 2CS (3): DB-88F3720-DDR4-Modular (4GB)
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- DDR3 1CS (4): DB-88F3720-DDR3-Modular (1GB); EspressoBIN V3-V5 (1GB 1CS)
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- DDR4 1CS (5): EspressoBin V7 (1GB)
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- DDR4 2CS (6): EspressoBin V7 (2GB)
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- DDR3 2CS (7): EspressoBin V3-V5 (2GB)
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- CUSTOMER (CUST): Customer board, DDR3 1CS 512MB
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- CLOCKSPRESET
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For Armada37x0 only, the clock tree configuration preset including CPU and DDR frequency,
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default is CPU_800_DDR_800.
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- CPU_600_DDR_600 - CPU at 600 MHz, DDR at 600 MHz
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- CPU_800_DDR_800 - CPU at 800 MHz, DDR at 800 MHz
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- CPU_1000_DDR_800 - CPU at 1000 MHz, DDR at 800 MHz
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- CPU_1200_DDR_750 - CPU at 1200 MHz, DDR at 750 MHz
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- BOOTDEV
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For Armada37x0 only, the flash boot device, default is ``SPINOR``.
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Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``:
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- SPINOR - SPI NOR flash boot
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- SPINAND - SPI NAND flash boot
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- EMMCNORM - eMMC Download Mode
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Download boot loader or program code from eMMC flash into CM3 or CA53
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Requires full initialization and command sequence
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- SATA - SATA device boot
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- PARTNUM
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For Armada37x0 only, the boot partition number, default is 0.
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To boot from eMMC, the value should be aligned with the parameter in
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U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is
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1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot
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build instructions.
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- WTMI_IMG
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For Armada37x0 only, the path of the WTMI image can point to an image which
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does nothing, an image which supports EFUSE or a customized CM3 firmware
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binary. The default image is wtmi.bin that built from sources in WTP
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folder, which is the next option. If the default image is OK, then this
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option should be skipped.
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- WTP
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For Armada37x0 only, use this parameter to point to wtptools source code
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directory, which can be found as a3700_utils.zip in the release. Usage
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example: ``WTP=/path/to/a3700_utils``
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For example, in order to build the image in debug mode with log level up to 'notice' level run
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.. code:: shell
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> make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> all fip
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And if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level,
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the image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS,
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the image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command
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line is as following
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.. code:: shell
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> make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \
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MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 all fip
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Supported MARVELL_PLATFORM are:
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- a3700 (for both A3720 DB and EspressoBin)
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- a70x0
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- a70x0_amc (for AMC board)
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- a80x0
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- a80x0_mcbin (for MacchiatoBin)
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- t9130 (OcteonTX2 CN913x)
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Special Build Flags
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--------------------
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- PLAT_RECOVERY_IMAGE_ENABLE
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When set this option to enable secondary recovery function when build atf.
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In order to build UART recovery image this operation should be disabled for
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A7K/8K/CN913x because of hardware limitation (boot from secondary image
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can interrupt UART recovery process). This MACRO definition is set in
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``plat/marvell/armada/a8k/common/include/platform_def.h`` file.
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- DDR32
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In order to work in 32bit DDR, instead of the default 64bit ECC DDR,
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this flag should be set to 1.
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For more information about build options, please refer to the
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:ref:`Build Options` document.
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Build output
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------------
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Marvell's TF-A compilation generates 7 files:
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- ble.bin - BLe image
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- bl1.bin - BL1 image
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- bl2.bin - BL2 image
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- bl31.bin - BL31 image
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- fip.bin - FIP image (contains BL2, BL31 & BL33 (U-Boot) images)
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- boot-image.bin - TF-A image (contains BL1 and FIP images)
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- flash-image.bin - Image which contains boot-image.bin and SPL image.
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Should be placed on the boot flash/device.
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Tools and external components installation
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------------------------------------------
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Armada37x0 Builds require installation of 3 components
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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(1) ARM cross compiler capable of building images for the service CPU (CM3).
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This component is usually included in the Linux host packages.
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On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed
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using the following command
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.. code:: shell
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> sudo apt-get install gcc-arm-linux-gnueabi
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Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be
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overwritten using the environment variable ``CROSS_CM3``.
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Example for BASH shell
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.. code:: shell
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> export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi
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(2) DDR initialization library sources (mv_ddr) available at the following repository
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(use the "mv-ddr-devel" branch):
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https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
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(3) Armada3700 tools available at the following repository
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(use the "A3700_utils-armada-18.12-fixed" branch):
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https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
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Armada70x0 and Armada80x0 Builds require installation of an additional component
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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(1) DDR initialization library sources (mv_ddr) available at the following repository
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(use the "mv-ddr-devel" branch):
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https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
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