Oliver Swede 4b5793c9a8 plat/arm/board/arm_fpga: Compile with additional CPU libraries ... This change is part of the goal of enabling the port to be compatible with multiple FPGA images. BL31 behaves differently depending on whether or not the CPUs in the system use cache coherency, and as a result any CPU libraries that are compiled together must serve processors that are consistent in this regard. This compiles a different set of CPU libraries depending on whether or not the HW_ASSISTED_COHERENCY is enabled at build-time to indicate the CPUs support hardware-level support for cache coherency. This build flag is used in the makefile in the same way as the Arm FVP port. Signed-off-by: Oliver Swede <oli.swede@arm.com> Change-Id: I18300b4443176b89767015e3688c0f315a91c27e		2020-03-26 20:41:59 +00:00
..
aarch64	plat/arm/board/arm_fpga: Add PSCI implementation for FPGA images	2020-03-26 20:40:48 +00:00
include	plat/arm/board/arm_fpga: Enable position-independent execution	2020-03-26 20:41:59 +00:00
fpga_bl31_setup.c	plat/arm/board/arm_fpga: Initialize the Generic Interrupt Controller	2020-03-26 20:41:58 +00:00
fpga_console.c	plat/arm/board/arm_fpga: Enable basic BL31 port for an FPGA image	2020-03-26 20:22:30 +00:00
fpga_def.h	plat/arm/board/arm_fpga: Enable port for alternative cluster configurations	2020-03-26 20:41:59 +00:00
fpga_gicv3.c	plat/arm/board/arm_fpga: Initialize the Generic Interrupt Controller	2020-03-26 20:41:58 +00:00
fpga_pm.c	plat/arm/board/arm_fpga: Initialize the Generic Interrupt Controller	2020-03-26 20:41:58 +00:00
fpga_private.h	plat/arm/board/arm_fpga: Initialize the Generic Interrupt Controller	2020-03-26 20:41:58 +00:00
fpga_topology.c	plat/arm/board/arm_fpga: Add PSCI implementation for FPGA images	2020-03-26 20:40:48 +00:00
platform.mk	plat/arm/board/arm_fpga: Compile with additional CPU libraries	2020-03-26 20:41:59 +00:00