arm-trusted-firmware/lib
Jeenu Viswambharan a10d3632ac PSCI: Introduce cache and barrier wrappers
The PSCI implementation performs cache maintenance operations on its
data structures to ensure their visibility to both cache-coherent and
non-cache-coherent participants. These cache maintenance operations
can be skipped if all PSCI participants are cache-coherent. When
HW_ASSISTED_COHERENCY build option is enabled, we assume PSCI
participants are cache-coherent.

For usage abstraction, this patch introduces wrappers for PSCI cache
maintenance and barrier operations used for state coordination: they are
effectively NOPs when HW_ASSISTED_COHERENCY is enabled, but are
applied otherwise.

Also refactor local state usage and associated cache operations to make
it clearer.

Change-Id: I77f17a90cba41085b7188c1345fe5731c99fad87
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-03-02 11:00:20 +00:00
..
aarch32 Introduce unified API to zero memory 2017-02-06 17:01:39 +00:00
aarch64 Introduce unified API to zero memory 2017-02-06 17:01:39 +00:00
cpus Merge pull request #848 from douglas-raillard-arm/dr/improve_errata_doc 2017-02-28 12:07:32 +00:00
el3_runtime Replace some memset call by zeromem 2017-02-06 17:01:39 +00:00
libfdt libfdt: Replace v1.4.1 by v1.4.2 2017-01-16 17:26:04 +00:00
locks Introduce locking primitives using CAS instruction 2017-02-14 09:26:11 +00:00
pmf Add Performance Measurement Framework(PMF) 2016-06-16 08:31:42 +01:00
psci PSCI: Introduce cache and barrier wrappers 2017-03-02 11:00:20 +00:00
semihosting AArch32: Common changes needed for BL1/BL2 2016-09-21 16:27:15 +01:00
stdlib stdlib: Import timingsafe_bcmp() from FreeBSD 2017-01-24 14:42:12 +00:00
xlat_tables Forbid block descriptors in initial xlat table levels 2016-12-13 15:38:19 +00:00