Pali Rohár 15546dbf40 fix(plat/marvell/a3720/uart): configure UART after TX FIFO reset ... If TX FIFO is not empty, do not touch UART settings and let UART HW transmit remaining bytes from TX FIFO. New UART settings are then set only after TX FIFO is reset. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I2976c0a4fbb841d3a79d42ef67c06e70174afc3b		2021-12-02 17:37:54 +01:00
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comphy	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
mc_trustzone	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
mg_conf_cm3	drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW	2020-07-10 10:55:09 +00:00
mochi	drivers/marvell: check if TRNG unit is present	2021-04-20 13:00:16 +02:00
secure_dfx_access	drivers: marvell: misc-dfx: extend dfx whitelist	2021-04-20 12:59:45 +02:00
uart	fix(plat/marvell/a3720/uart): configure UART after TX FIFO reset	2021-12-02 17:37:54 +01:00
amb_adec.c	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
ap807_clocks_init.c	ble: ap807: improve PLL configuration sequence	2020-06-07 00:06:03 +02:00
cache_llc.c	drivers: marvell: Fix the LLC SRAM driver	2020-07-10 10:55:33 +00:00
ccu.c	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
comphy.h	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
ddr_phy_access.c	ddr_phy: use smc calls to access ddr phy registers	2021-04-20 12:59:34 +02:00
ddr_phy_access.h	ddr_phy: use smc calls to access ddr phy registers	2021-04-20 12:59:34 +02:00
gwin.c	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
io_win.c	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
iob.c	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
mci.c	plat: marvell: mci: perform mci link tuning for all mci interfaces	2020-06-07 00:06:03 +02:00
thermal.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00