Isla Mitchell abbffe98ed Add support for Cortex-Ares and Cortex-A76 CPUs ... Both Cortex-Ares and Cortex-A76 CPUs use the ARM DynamIQ Shared Unit (DSU). The power-down and power-up sequences are therefore mostly managed in hardware, and required software operations are simple. Change-Id: I3a9447b5bdbdbc5ed845b20f6564d086516fa161 Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>		2018-06-08 11:46:31 +01:00
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arm	Add support for Cortex-Ares and Cortex-A76 CPUs	2018-06-08 11:46:31 +01:00
common	Fix build error with correct format string	2018-05-15 17:05:36 +01:00
compat	Do not enable SVE on pre-v8.2 platforms	2017-11-30 17:45:23 +00:00
hisilicon	Merge pull request #1361 from vchong/tool_add_img	2018-05-01 17:12:51 +01:00
layerscape	layerscape: fix integer handling issues	2018-04-11 12:12:24 +00:00
mediatek	Fix pointer type mismatch of handlers	2018-04-27 18:35:02 +09:00
nvidia/tegra	types: use int-ll64 for both aarch32 and aarch64	2018-04-27 18:35:02 +09:00
qemu	Merge pull request #1334 from michpappas/tf-issues#572_qemu_dont_use_C_for_crash_console	2018-04-03 11:59:55 +01:00
rockchip	rockchip/rk3399: Add watchdog support in pmusram	2018-05-15 16:31:19 +08:00
rpi3	Merge pull request #1313 from jonathanwright-ARM/jw/MISRA-switch-statements	2018-03-29 13:20:05 +01:00
socionext/uniphier	plat: fix switch statements to comply with MISRA rules	2018-03-26 12:43:05 +01:00
xilinx/zynqmp	zynqmp: Add wdt timeout restart functionality	2018-05-17 15:19:26 +05:30