arm-trusted-firmware/bl32/tsp
Douglas Raillard 3df6012a3e Abort preempted TSP STD SMC after PSCI CPU suspend
Standard SMC requests that are handled in the secure-world by the Secure
Payload can be preempted by interrupts that must be handled in the
normal world. When the TSP is preempted the secure context is stored and
control is passed to the normal world to handle the non-secure
interrupt. Once completed the preempted secure context is restored. When
restoring the preempted context, the dispatcher assumes that the TSP
preempted context is still stored as the SECURE context by the context
management library.

However, PSCI power management operations causes synchronous entry into
TSP. This overwrites the preempted SECURE context in the context
management library. When restoring back the SECURE context, the Secure
Payload crashes because this context is not the preempted context
anymore.

This patch avoids corruption of the preempted SECURE context by aborting
any preempted SMC during PSCI power management calls. The
abort_std_smc_entry hook of the TSP is called when aborting the SMC
request.

It also exposes this feature as a FAST SMC callable from normal world to
abort preempted SMC with FID TSP_FID_ABORT.

Change-Id: I7a70347e9293f47d87b5de20484b4ffefb56b770
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
2016-12-23 10:46:32 +00:00
..
aarch64 Abort preempted TSP STD SMC after PSCI CPU suspend 2016-12-23 10:46:32 +00:00
tsp.ld.S Introduce SEPARATE_CODE_AND_RODATA build flag 2016-07-08 14:55:11 +01:00
tsp.mk Move spinlock library code to AArch64 folder 2016-08-09 17:33:57 +01:00
tsp_interrupt.c Enable use of FIQs and IRQs as TSP interrupts 2015-12-04 12:02:12 +00:00
tsp_main.c Abort preempted TSP STD SMC after PSCI CPU suspend 2016-12-23 10:46:32 +00:00
tsp_private.h Enable use of FIQs and IRQs as TSP interrupts 2015-12-04 12:02:12 +00:00
tsp_timer.c PSCI: Migrate SPDs and TSP to the new platform and framework API 2015-08-13 23:48:07 +01:00