Xing Zheng 941c71475e rockchip: rk3399: configure the DDR secure region for BL31 image ... Move the BL31 loaded base address 0x10000 to 0x1000, and configure the the memory range 0~1MB is secure, the goal is that make sure the BL31 image will be not modified. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>		2017-02-24 20:07:44 +08:00
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dram	rockchip: Clean up header and referenced files	2017-02-24 20:07:44 +08:00
gpio	rockchip/rk3399: improve gpio driver and support get pull mode function	2016-09-10 04:06:39 +08:00
m0	rockchip: Clean up header and referenced files	2017-02-24 20:07:44 +08:00
pmu	rockchip: Clean up header and referenced files	2017-02-24 20:07:44 +08:00
pwm	rockchip: update to handle PWMs for rk3399	2016-08-11 13:09:28 +08:00
soc	rockchip: rk3399: configure the DDR secure region for BL31 image	2017-02-24 20:07:44 +08:00