arm-trusted-firmware/plat/intel/soc/common/include
Abdul Halim, Muhammad Hadi Asyrafi d57318b7c9 intel: common: Fix non-MISRA compliant code v2
This patch is used to fix remaining non compliant code for Intel
SoCFPGA's mailbox and sip driver. These changes include:
- Change non-interface required uint32_t into unsigned int
- Change non-negative variable to unsigned int
- Remove obsolete variable initialization to 0

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I3a16c7621a5fc75eb614d97d72e44c86e7d53bf5
2020-10-27 11:21:00 +08:00
..
plat_macros.S intel: Platform common code refactor 2019-08-07 12:19:11 +00:00
platform_def.h intel: clear 'PLAT_SEC_ENTRY' in early platform setup 2020-10-24 11:00:42 +08:00
socfpga_emac.h intel: Enable EMAC PHY in Intel FPGA platform 2020-02-25 10:19:51 +08:00
socfpga_handoff.h intel: Change boot source selection 2020-02-03 14:31:52 +08:00
socfpga_mailbox.h intel: common: Fix non-MISRA compliant code v2 2020-10-27 11:21:00 +08:00
socfpga_private.h intel: stratix10: Enable uboot entrypoint support 2019-12-17 12:54:29 +08:00
socfpga_reset_manager.h intel: Refactor reset manager driver 2020-01-16 10:53:23 +08:00
socfpga_sip_svc.h intel: common: Change how mailbox handles job id & buffer 2020-10-27 11:17:34 +08:00
socfpga_system_manager.h plat: intel: Add FPGAINTF configuration to when configuring pinmux 2020-06-08 22:03:41 +00:00