f1be00da0b
The Secure Configuration Register is 64-bits in AArch64 and 32-bits in AArch32. Use u_register_t instead of unsigned int to reflect this. Change-Id: I51b69467baba36bf0cfaec2595dc8837b1566934 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com> |
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.. | ||
aarch32 | ||
aarch64 | ||
drivers | ||
include | ||
pmusram | ||
bl31_plat_setup.c | ||
params_setup.c | ||
plat_pm.c | ||
plat_topology.c | ||
rockchip_gicv2.c | ||
rockchip_gicv3.c | ||
rockchip_sip_svc.c | ||
sp_min_plat_setup.c |