Louis Mayencourt cba71b70ef Cortex-A35: Implement workaround for errata 855472 ... Under specific conditions, the processor might issue an eviction and an L2 cache clean operation to the interconnect in the wrong order. Set the CPUACTLR.ENDCCASCI bit to 1 to avoid this. Change-Id: Ide7393adeae04581fa70eb9173b742049fc3e050 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>		2019-04-17 13:46:43 +01:00
..
aem_generic.h	cpus: Add casts to all definitions in CPU headers	2019-02-11 13:34:57 +00:00
cortex_a35.h	Cortex-A35: Implement workaround for errata 855472	2019-04-17 13:46:43 +01:00
cortex_a53.h	cpus: Add casts to all definitions in CPU headers	2019-02-11 13:34:57 +00:00
cortex_a55.h	Cortex-A55: Implement workaround for erratum 798797	2019-02-28 09:56:58 +00:00
cortex_a57.h	Cortex-A57: Implement workaround for erratum 814670	2019-02-28 09:56:58 +00:00
cortex_a72.h	cpus: Add casts to all definitions in CPU headers	2019-02-11 13:34:57 +00:00
cortex_a73.h	Cortex-A73: Implement workaround for errata 852427	2019-02-28 12:01:13 +00:00
cortex_a75.h	cpus: Add casts to all definitions in CPU headers	2019-02-11 13:34:57 +00:00
cortex_a76.h	Add workaround for errata 1073348 for Cortex-A76	2019-02-26 16:21:06 +00:00
cortex_a76ae.h	Add support for Cortex-A76AE CPU	2019-04-08 14:48:55 +01:00
cortex_deimos.h	cpus: Add casts to all definitions in CPU headers	2019-02-11 13:34:57 +00:00
cpu_macros.S	Update macro to check need for CVE-2017-5715 mitigation	2019-02-14 14:43:43 +00:00
cpuamu.h	Fix MISRA defects in extension libs	2018-10-29 14:41:48 +00:00
denver.h	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
dsu_def.h	cpus: Add casts to all definitions in CPU headers	2019-02-11 13:34:57 +00:00
neoverse_e1.h	Fix wrong MIDR_EL1 value for Neoverse E1	2019-03-15 15:40:27 +00:00
neoverse_n1.h	Rename Cortex-Ares to Neoverse N1	2019-02-19 13:50:07 +00:00
neoverse_zeus.h	Introduce preliminary support for Neoverse Zeus	2019-03-14 11:39:40 +00:00