arm-trusted-firmware/include/arch
John Tsichritzis c250cc3b1b SSBS: init SPSR register with default SSBS value
This patch introduces an additional precautionary step to further
enhance protection against variant 4. During the context initialisation
before we enter the various BL stages, the SPSR.SSBS bit is explicitly
set to zero. As such, speculative loads/stores are by default disabled
for all BL stages when they start executing. Subsequently, each BL
stage, can choose to enable speculative loads/stores or keep them
disabled.

This change doesn't affect the initial execution context of BL33 which
is totally platform dependent and, thus, it is intentionally left up to
each platform to initialise.

For Arm platforms, SPSR.SSBS is set to zero for BL33 too. This means
that, for Arm platforms, all BL stages start with speculative
loads/stores disabled.

Change-Id: Ie47d39c391d3f20fc2852fc59dbd336f8cacdd6c
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
2019-07-24 12:49:53 +01:00
..
aarch32 SSBS: init SPSR register with default SSBS value 2019-07-24 12:49:53 +01:00
aarch64 SSBS: init SPSR register with default SSBS value 2019-07-24 12:49:53 +01:00