XiaoDong Huang 11a0a46a89 rockchip: fix definition of struct param_ddr_usage ... In extreme cases, the number of secure regions is one more than non-secure regions. So array "s_base" and "s_top"s size in struct param_ddr_usage need to be adjust to "DDR_REGION_NR_MAX + 1". Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com> Change-Id: Ifc09da2c8f8afa1aebcc78f8fbc21ac95abdece2		2020-02-17 08:53:39 +08:00
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aarch32	rockchip: add common aarch32 support	2019-04-25 13:37:56 +02:00
aarch64	rockchip: move pmusram assembler code to a aarch64 subdir	2019-04-25 13:37:56 +02:00
drivers	rockchip: fix definition of struct param_ddr_usage	2020-02-17 08:53:39 +08:00
include	Merge changes from topic "rockchip-uart-fixes" into integration	2019-08-15 15:30:13 +00:00
pmusram	Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__	2019-08-01 13:14:12 -07:00
bl31_plat_setup.c	rockchip: move dt-coreboot uart distinction into param handling code	2019-08-09 09:40:19 +02:00
params_setup.c	plat/rockchip: initialize reset and poweroff GPIOs with known invalid value	2019-11-17 12:38:24 -08:00
plat_pm.c	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00
plat_topology.c	rockchip: add common aarch32 support	2019-04-25 13:37:56 +02:00
rockchip_gicv2.c	rockchip: Fix GICv2 interrupts	2019-01-28 14:35:50 +00:00
rockchip_gicv3.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
rockchip_sip_svc.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
sp_min_plat_setup.c	rockchip: move dt-coreboot uart distinction into param handling code	2019-08-09 09:40:19 +02:00