arm-trusted-firmware/plat/intel/soc/agilex
Sieu Mun Tang f571183b06 fix(intel): make FPGA memory configurations platform specific
Define FPGA_CONFIG_SIZE and FPGA_CONFIG_ADDR in
platform-specific header. This is due to different
allocated sizes between platforms.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Iac4fbf4d4940cdf31834a9d4332f9292870dee76
2022-03-09 09:14:21 +08:00
..
include fix(intel): make FPGA memory configurations platform specific 2022-03-09 09:14:21 +08:00
soc plat: intel: Add FPGAINTF configuration to when configuring pinmux 2020-06-08 22:03:41 +00:00
bl2_plat_setup.c Merge "fix(intel): assert if bl_mem_params is NULL pointer" into integration 2022-02-28 20:36:30 +01:00
bl31_plat_setup.c intel: mailbox: Ensure time out duration is predictive 2020-10-27 11:17:40 +08:00
platform.mk fix(intel): fix ECC Double Bit Error handling 2022-03-09 09:14:16 +08:00