kalyani chidambaram fdc08e2ecb Tegra210: SiP handlers to allow PMC access ... This patch adds SiP handler for Tegra210 platforms to service read/write requests for PMC block. None of the secure registers are accessible to the NS world though. Change-Id: I7dc1f10c6a6ee6efc642ddcfb1170fb36d3accff Signed-off-by: kalyani chidambaram <kalyanic@nvidia.com>		2019-01-31 08:49:05 -08:00
..
bpmp.h	Tegra: fix defects flagged by MISRA Rule 10.3	2019-01-18 09:21:50 -08:00
bpmp_ipc.h	Tegra: bpmp_ipc: support to enable/disable module clocks	2019-01-31 08:45:49 -08:00
flowctrl.h	Tegra: support for System Suspend using sc7entry-fw binary	2019-01-31 08:48:36 -08:00
gpcdma.h	Tegra: gpcdma: driver for general purpose DMA	2019-01-18 09:21:50 -08:00
mce.h	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
memctrl.h	Tegra: memctrl: clean MC INT status before exit to bootloader	2019-01-18 09:21:51 -08:00
memctrl_v1.h	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
memctrl_v2.h	Tegra: memctrl_v2: platform handler for TZDRAM settings	2019-01-23 10:32:46 -08:00
pmc.h	Tegra210: SiP handlers to allow PMC access	2019-01-31 08:49:05 -08:00
security_engine.h	Tegra210B01: SE/SE2 and PKA1 context save (SW)	2019-01-18 09:21:51 -08:00
smmu.h	Tegra186: smmu: add support for backup multiple smmu regs	2019-01-31 08:45:22 -08:00
tegra_gic.h	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00