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10 Commits

Author SHA1 Message Date
Jiafei Pan 5161cfde9b fix(layerscape): fix coverity issue 
Check return value of mmap_add_dynamic_region().

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I84e257b3052371e18af158c3254f42a1bae0da10
 2022-03-30 10:38:22 +08:00
Jiafei Pan 9df5ba05b4 feat(ls1088a): add new SoC platform ls1088a 
LS1088A is a cost-effective, powerefficient, and highly integrated
SoC device featuring eight extremely power-efficient 64-bit ARM
Cortex-A53 cores with ECC-protected L1 and L2 cache memories for
high reliability, running up to 1.6 GHz.

This patch is to add ls1088a SoC support in TF-A.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Id9ebcdad1beab07ea81a41955edd4f471d6cf090
 2022-03-27 23:24:24 +08:00
Biwen Li e2818d0afc fix(layerscape): fix build issue of mmap_add_ddr_region_dynamically 
Fix build issue of mmap_add_ddr_region_dynamically():
ls_bl2_el3_setup.c:(.text.bl2_plat_preload_setup+0x28): undefined
reference to mmap_add_ddr_region_dynamically

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I74a8b4c2337fc0646d6acb16ce61755c5efbdf38
 2022-03-27 23:24:24 +08:00
Jiafei Pan 3ccd7e45a2 fix(nxp/common/setup): increase soc name maximum length 
Increate SoC name length as it is not enough for some
SoC personalities.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I2142b4b5162dd3c9ab3afefcdc859063836d8bcc
 2022-01-20 23:38:03 +08:00
Jiafei Pan b759727f59 feat(nxp/common/io): add ifc nor and nand as io devices 
Added IFC Nor and NAN flash as boot IO devices.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ie1b87174d9c08d4e32138066b007fef6f8e3c5dd
 2022-01-20 23:38:03 +08:00
Jiafei Pan 0259a3e828 fix(nxp/common/setup): fix total dram size checking 
total_dram_size should be signed value because it is equal to return
value of init_ddr(), so if it is lower or equal zero, report
error as DDR is not initialized correctly.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Idbc40da103f60f10cb18c5306e97b764c1a9d372
 2022-01-19 11:36:23 +08:00
Scott Branden 4ce3e99a33 fix: libc: use long for 64-bit types on aarch64 
Use long instead of long long on aarch64 for 64_t stdint types.
Introduce inttypes.h to properly support printf format specifiers for
fixed width types for such change.

Change-Id: I0bca594687a996fde0a9702d7a383055b99f10a1
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
 2021-11-08 14:41:17 +00:00
Jiafei Pan 35efe7a4ce feat(plat/nxp/common): define common macro for ARM registers 
Define common register macro both for Cortex-A53 and Cortex-A72
because the code will be used by both Cortex platform.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I485661bfe3ed4f214c403ff6af53dc6af1ddf089
 2021-09-15 11:19:36 +08:00
Jiafei Pan 08695df91d refactor(plat/nxp): refine api to read SVR register 
1. Refined struct soc_info_t definition.
2. Refined get_soc_info function.
3. Fixed some SVR persernality value.
4. Refined API to get cluster numbers and cores per cluster.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I3c20611a523516cc63330dce4c925e6cda1e93c4
 2021-08-26 10:08:57 +08:00
Pankaj Gupta b53c2c5f2d nxp: platform files for bl2 and bl31 setup 
For NXP platforms:
- Setup files for BL2 and BL31
- Other supporting files.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I36a1183a0652701bdede9e02d41eb976accbb017
 2021-03-24 09:49:32 +05:30