Commit Graph

15 Commits

Author SHA1 Message Date
dp-arm 82cb2c1ad9 Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by FreeBSD have not been modified.

[0]: https://spdx.org/

Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-03 09:39:28 +01:00
Derek Basehore 50bde47fe3 rockchip: rk3399: Move DQS drive strength setting to M0
This moves the setting of the DQS drive strength to the M0 to minimize
the impact on DDR transactions. We need to have the DQS drive strength
changed for data training, which is triggered by the M0, but it also
needs to be changed back when data training is finished.

Signed-off-by: Derek Basehore <dbasehore@chromium.org>
2017-02-24 20:07:45 +08:00
Julius Werner 4dbab5d27f rockchip: Add MIN() and MAX() macros back to M0 code
These macros were accidentally deleted in a previous cleanup. This
slipped through because the code using them is currently unused, but
that may change in the future.

Signed-off-by: Julius Werner <jwerner@chromium.org>
2017-02-24 20:07:45 +08:00
Julius Werner 2d051d2f96 rockchip: Clean up M0 Makefile, clarify float-abi
This patch shuffles the M0 Makefile flags around a bit trying to make
their purpose clearer and remove duplication. Since all three build
steps (compiling, assembling, linking) actually call GCC, remove the
misleading aliases $(AS) and $(LD) to avoid confusion that those tools
might be called directly. Split flags into a common group that has
meaning for all three steps and separate variables specific to each
step. Remove -nostartfiles which is a strict subset of -nostdlib.

Also add explicit parameters for -mfloat-abi=soft, -fomit-frame-pointer
and -fno-common. If omitted these settings depend on the toolchain's
built-in default and cause various problems if they resolve to
unexpected values.

Signed-off-by: Julius Werner <jwerner@chromium.org>
2017-02-24 20:07:45 +08:00
Xing Zheng 1830f7901e rockchip: Clean up header and referenced files
So far, there are more and more features are supported on the RK3399,
meanwhile, these features are increasingly being defined and intertwined.
It's time to clean up and make them clearer.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2017-02-24 20:07:44 +08:00
Derek Basehore a7519b6bed rockchip: rk3399: Don't wait for vblank in M0 for ddrfreq
This removes waiting for vblank on the M0 during ddrfreq transitions.
That will now be done in the kernel to allow scheduling to be done on
the CPU core that changes the ddr frequency. Waiting for vblank in
the M0 would have the CPU core that waits on the M0 spin looping for
up to 16ms (1 frame for the display).

Signed-off-by: Derek Basehore <dbasehore@chromium.org>
2017-02-24 20:07:44 +08:00
Lin Huang ef0a6bfc69 rockchip: rk3399: restore PMU_CRU_GATEDIS_CON0 value after ddr dvfs
we will set PMU_CRU_GATEDIS_CON0 when idle port, it will enable
all clock, for save power consumption, we need to restore old value
when finish it.

Signed-off-by: Lin Huang <hl@rock-chips.com>
2017-02-24 20:07:44 +08:00
Lin Huang a82ec81459 rockchip: rk3399: check vop status when we wait dma finish flag
When vop is disabled and we read the vop register the system will
hang, so check vop status when we wait for the DMA finish flag to
avoid this sitiuation. This is done by checking for standby, DMA stop
mode, and disabled window states. Any one of these will prevent the
DMA finish flag from triggering.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
2017-02-24 20:07:44 +08:00
Lin Huang 95c3f422d8 rockchip: rk3399: add stopwatch functions to m0
There is system timer in m0, we can use it to implement a set of
stopwatch functions for measuring timeouts.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
2017-02-24 20:07:44 +08:00
Xing Zheng 977001aa87 rk3399: dram: use PMU M0 to do ddr frequency scaling
We used dcf do ddr frequency scaling, but we just include a dcf
binary, it hard to maintain later, we have M0 compile flow in ATF,
and M0 can also work for ddr frequency scaling, so let's use it.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2017-02-24 20:07:44 +08:00
Xing Zheng a9a4d23a7d rockchip: update the raw read/write APIs for M0
Since the ATF project, we usually use the mmio_read_32 and
mmio_write_32. And the mmio_write_32, the firse parameter
is ADDR, the second is VALUE. In order to style consistency:

1/ rename readl/writel to mmio_read_32/mmio_write_32
2/ for keeping the same with mmio_write_32 in the ATF project,
   swap the order of the parameters for M0 mmio_write_32

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Lin Huang <hl@rock-chips.com>
2017-02-24 20:07:21 +08:00
Patrick Georgi 742df4f614 rockchip: Build m0 firmware without standard libraries
Depending on the compiler used, it might try to link in libc even though
it's not required. Stop it from doing that.

Signed-off-by: Patrick Georgi <pgeorgi@google.com>
2017-01-04 19:06:14 +01:00
Julius Werner 71581c9c17 rockchip: Add proper dependency tracking to M0 Makefile
This patch adds dependency rule generation and inclusion to the M0
Makefile, so that M0 objects will get correctly remade with an
incremental build if a header file they included changed.

Change-Id: I2067bd9fd4d9dad3e77a09cbf09c7b4db3c1eda5
Signed-off-by: Julius Werner <jwerner@chromium.org>
2016-11-03 14:57:11 -07:00
Julius Werner e77ade2887 rockchip: Clean up parent directory creation for M0
The dependencies in the M0 Makefile are not correctly laid out, which
may lead to errors with make -j if the binary target gets evaluated
before the target that creates the directory. In addition, the M0
Makefile just calls mkdir without using the platform-independent macros
from the main ARM TF build system. This patch fixes those issues,
removes some unused (and broken) M0 build targets and merges the two M0
output directories into one (since there's no real point splitting it up
and it creates more hassle).

Change-Id: Ia5002479cf9c57fea7aefa8ca88e373df3a51f61
Signed-off-by: Julius Werner <jwerner@chromium.org>
2016-11-03 14:57:10 -07:00
Caesar Wang 8382e17c4c rockchip: add M0 source code and build system for RK3399
This CL supports add M0 source code to built into the bl31.bin, the
goal is that we can load the M0 code binary into SRAM and execute it.

We need the M0 help us to clean the power_mode_en bit during the AP
PMU enter the state machine with interrupt, and avoid to the AP can
not exit the loop forever.

Change-Id: I844582c54a1f0d44ca41290d44618df58679f341
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-10-25 03:29:42 +08:00