Commit Graph

838 Commits

Author SHA1 Message Date
Antonio Nino Diaz 5283962eba Add ARMv8.3-PAuth registers to CPU context
ARMv8.3-PAuth adds functionality that supports address authentication of
the contents of a register before that register is used as the target of
an indirect branch, or as a load.

This feature is supported only in AArch64 state.

This feature is mandatory in ARMv8.3 implementations.

This feature adds several registers to EL1. A new option called
CTX_INCLUDE_PAUTH_REGS has been added to select if the TF needs to save
them during Non-secure <-> Secure world switches. This option must be
enabled if the hardware has the registers or the values will be leaked
during world switches.

To prevent leaks, this patch also disables pointer authentication in the
Secure world if CTX_INCLUDE_PAUTH_REGS is 0. Any attempt to use it will
be trapped in EL3.

Change-Id: I27beba9907b9a86c6df1d0c5bf6180c972830855
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-27 11:08:59 +00:00
Antonio Niño Díaz 39718ea562
Merge pull request #1834 from thloh85-intel/s10_bl31
plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform
2019-02-27 10:22:34 +00:00
Tien Hock, Loh 1cf55aba49 plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform
This adds BL31 support to Intel Stratix10 SoCFPGA platform. BL31 in TF-A
supports:
- PSCI calls to enable 4 CPU cores
- PSCI mailbox calls for FPGA reconfiguration

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
2019-02-26 09:25:14 +08:00
Antonio Niño Díaz ab3d22473d
Merge pull request #1836 from Yann-lms/docs_and_m4
Update documentation for STM32MP1 and add Cortex-M4 support
2019-02-22 15:23:52 +00:00
Antonio Niño Díaz 5ba32a7660
Merge pull request #1828 from uarif1/master
Introduce Versatile Express FVP platform to arm-trusted-firmware.
2019-02-21 13:47:08 +00:00
Yann Gautier 774b4a8190 docs: stm32mp1: add links to documentation
A link to st.com page describing STM32MP1 is added.
Add the information about Cortex-M4 embedded in STM32MP1.
Correct typo for u-boot command.

Change-Id: Ie900f6ee59461c5e7ad8a8b06854abaf41fca3ce
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-02-20 17:34:16 +01:00
Antonio Niño Díaz c8a6af6623
Merge pull request #1832 from jts-arm/docs
docs: Document romlib design
2019-02-20 14:21:34 +00:00
Usama Arif 5dbc783aef Documentation for Versatile Express Fixed Virtual Platforms
This documentation contains information about the boot sequence,
code location and build procedure for fvp_ve platform.

Change-Id: I339903f663cc625cfabc75ed8e4accb8b2c3917c
Signed-off-by: Usama Arif <usama.arif@arm.com>
2019-02-19 17:08:59 +00:00
Sathees Balya e36950bd69 docs: Document romlib design
Change-Id: I2b75be16f452a8ab7c2445ccd519fb057a135812
Co-authored-by: John Tsichritzis <john.tsichritzis@arm.com>
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
2019-02-19 15:49:23 +00:00
Antonio Nino Diaz d71446c38a docs: Update documentation about ARMv8.2-TTCNP
Commit 2559b2c825 ("xlat v2: Dynamically detect need for CnP bit")
modified the code to convert the compile-time check for ARMv8.2-TTCNP to
a runtime check, but forgot to update the documentation associated to it.

Change-Id: I6d33a4de389d976dbdcce65d8fdf138959530669
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-19 14:59:56 +00:00
Antonio Nino Diaz 8f457dacb0 docs: Update note about plat/arm in Porting Guide
Platforms are not allowed to use any file inside include/plat/arm or
plat/arm to prevent dependencies between Arm platforms and non-Arm
platforms.

Change-Id: I6dc336ab71134c8d2758761fac0e4716e2d7e6ff
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-13 14:07:38 +00:00
Antonio Niño Díaz 288abd6331
Merge pull request #1818 from pbeesley-arm/doc-links
doc: Fix broken external links
2019-02-12 18:47:52 +00:00
Paul Beesley dd4e9a7da0 doc: Fix broken external links
Using Sphinx linkcheck on the TF-A docs revealed some broken
or permanently-redirected links. These have been updated where
possible.

Change-Id: Ie1fead47972ede3331973759b50ee466264bd2ee
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-02-08 16:52:24 +00:00
Sandrine Bailleux f3cacadae3 Doc: Remove useless escape characters
Just like has been done in the porting guide a couple of patches
earlier, kill all escaped underscore characters in all documents.

Change-Id: I7fb5b806412849761d9221a6ce3cbd95ec43d611
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-02-08 16:33:21 +01:00
Sandrine Bailleux 337e2f1f2b Miscellaneous doc fixes/enhancements
Change-Id: I915303cea787d9fb188428b98ac6cfc610cc4470
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-02-08 16:33:17 +01:00
Sandrine Bailleux 9aa6b6371f Porting Guide: Fix some broken links
Fix links to SCC and FreeBSD. Direct links do not need any special
formatting.

Change-Id: I00f7343d029a30ec02dfaa0ef393b3197260cab9
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-02-08 16:21:24 +01:00
Sandrine Bailleux ab4a90cd0f Porting Guide: Remove useless escape characters
Replace all occurences of escaped underscore characters by plain ones.
This makes the text version of the porting guide easier to read and
grep into.

Change-Id: I7bf3b292b686be4c6d847a467b6708ac16544c90
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-02-08 16:21:24 +01:00
Antonio Niño Díaz 30490b15fe
Merge pull request #1785 from vwadekar/tf2.0-tegra-downstream-rebase-1.25.19
Tf2.0 tegra downstream rebase 1.25.19
2019-02-06 10:20:25 +00:00
Varun Wadekar a474d3d700 docs: add Tegra186 information to nvidia-tegra.rst
This patch adds information about the Tegra186 platforms to the
docs.

Change-Id: I69525c60a0126030dc15505ec7f02ccf8250be6f
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:43 -08:00
Varun Wadekar 77f1f7a117 Introduce build option to override libc
This patch introduces a build option 'OVERRIDE_LIBC' that platforms
can set to override libc from the BL image. The default value is '0'
to keep the library.

Change-Id: I10a0b247f6a782eeea4a0359e30a8d79b1e9e4e1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:32 -08:00
Antonio Niño Díaz a45ccf135e
Merge pull request #1804 from antonio-nino-diaz-arm/an/cleanup
Minor cleanup
2019-02-05 11:31:15 +00:00
Antonio Nino Diaz 5e447816c7 Remove unneeded include paths in PLAT_INCLUDES
Also, update platform_def.h guidelines about includes in the porting
guide.

Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-01 12:24:57 +00:00
Antonio Niño Díaz 0d8453564b
Merge pull request #1800 from sandrine-bailleux-arm/sb/load-img-v2
Remove dead code related to LOAD_IMAGE_V2=0
2019-02-01 11:43:17 +00:00
Sandrine Bailleux e9ebd54e69 User Guide: Move ARM_PLAT_MT doc to Arm build flags
ARM_PLAT_MT build flag is specific to Arm platforms so should not
be classified as a common build option.

Change-Id: I79e411958846759a5b60d770e53f44bbec5febe6
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-01-31 16:12:50 +01:00
Sandrine Bailleux c4e9d827ee Remove dead code related to LOAD_IMAGE_V2=0
Commit ed51b51f7a ("Remove build option LOAD_IMAGE_V2") intended
to remove all code related to LOAD_IMAGE_V2=0 but missed a few things.

Change-Id: I16aaf52779dd4af1e134e682731328c5f1e5d622
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-01-31 16:10:54 +01:00
Paul Beesley f8ea0df20b doc: Fix broken code blocks in coding guidelines
Sections 2.2, 2.3 and 2.4 contained example code blocks that were not
being formatted properly due to missing newlines.

Change-Id: I0dbce90c931cf69e4f47d2ccbcc8bc0e20f8fd66
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-01-31 11:39:29 +00:00
Antonio Niño Díaz 766ff011ca
Merge pull request #1797 from antonio-nino-diaz-arm/an/remove-smccc-v2
Remove support for the SMC Calling Convention 2.0
2019-01-31 10:23:06 +00:00
Antonio Nino Diaz 0709055ed6 Remove support for the SMC Calling Convention 2.0
This reverts commit 2f37046524 ("Add support for the SMC Calling
Convention 2.0").

SMCCC v2.0 is no longer required for SPM, and won't be needed in the
future. Removing it makes the SMC handling code less complicated.

The SPM implementation based on SPCI and SPRT was using it, but it has
been adapted to SMCCC v1.0.

Change-Id: I36795b91857b2b9c00437cfbfed04b3c1627f578
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-30 16:01:49 +00:00
Paul Beesley a93f6f8742 doc: Add details on #include ordering
This patch adds more details on #include directive use, including (pun
not intended) the desired ordering, grouping and variants (<> or "").

Change-Id: Ib024ffc4d3577c63179e1bbc408f0d0462026312
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-01-29 10:12:06 +00:00
Paul Beesley 7306de9991 doc: Reorder coding guidelines document
This patch attempts to make the guidelines clearer by reordering
the sections and grouping similar topics.

Change-Id: I1418d6fc060d6403fe3e1978f32fd54b8793ad5b
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-01-29 10:12:05 +00:00
Paul Beesley 93fbc7142e doc: Link coding guidelines to user guide
Adds a link from user-guide.rst to coding-guidelines.rst and merges
the information about using checkpatch from both files into the user
guide document.

Change-Id: Iffbb4225836a042d20024faf28b8bdd6b2c4043e
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-01-29 10:12:05 +00:00
Paul Beesley 5bfca3d329 doc: Clarify ssize_t use in coding guidelines
Change-Id: I083f673f37495d2e53c704a43a0892231b6eb281
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-01-29 10:12:05 +00:00
Paul Beesley bdad86e9c8 doc: Add AAPCS link to coding guidelines
Change-Id: Id0e6d272b6d3d37eab785273f9c12c093191f3fc
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-01-29 10:12:05 +00:00
Paul Beesley 12cfc60256 doc: Add Coding Guidelines document
This content has been imported and adapted from the TF GitHub wiki
article 'ARM-Trusted-Firmware-Coding-Guidelines'.

The aim is to increase the visibility of the coding guidelines by
including them as part of the documentation that is within the TF
repository.

Additionally, the documentation can then be linked to by other
documents in the docs/ directory without worrying about broken links
to, for example, the external wiki.

Change-Id: I9d8cd6b5117b707c1a113baeba7fc5e1b4bf33bc
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-01-29 10:12:05 +00:00
Antonio Niño Díaz 7ca572d93c
Merge pull request #1761 from satheesbalya-arm/sb1/sb1_2661_bl31_overlay
plat/arm: Save BL2 descriptors to reserved memory.
2019-01-25 11:24:40 +00:00
Sathees Balya 5b8d50e407 plat/arm: Save BL2 descriptors to reserved memory.
On ARM platforms, the BL2 memory can be overlaid by BL31/BL32. The memory
descriptors describing the list of executable images are created in BL2
R/W memory, which could be possibly corrupted later on by BL31/BL32 due
to overlay. This patch creates a reserved location in SRAM for these
descriptors and are copied over by BL2 before handing over to next BL
image.

Also this patch increases the PLAT_ARM_MAX_BL2_SIZE for juno when TBBR
is enabled.

Fixes ARM-Software/tf-issues#626

Change-Id: I755735706fa702024b4032f51ed4895b3687377f
Signed-off-by: Sathees Balya <sathees.balya@arm.com>
2019-01-23 16:01:19 +00:00
Antonio Niño Díaz ae478c26e5
Merge pull request #1768 from bryanodonoghue/integration+linaro_warp7-tbb
Integration+linaro warp7 tbb
2019-01-23 14:46:46 +00:00
Varun Wadekar 087cf68a7f Tegra: lib: library for profiling the cold boot path
The non secure world would like to profile the boot path for
the EL3 and S-EL1 firmwares. To allow it to do that, a non-secure
DRAM region (4K) is allocated and the base address is passed to
the EL3 firmware.

This patch adds a library to allow the platform code to store the
tag:timestamp pair to the shared memory. The tegra platform code
then uses the `record` method to add timestamps.

Original change by Akshay Sharan <asharan@nvidia.com>

Change-Id: Idbbef9c83ed84a508b04d85a6637775960dc94ba
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-18 09:21:51 -08:00
Bryan O'Donoghue 31e4c20de6 docs: warp7: Update WaRP7 description for TBB
This patch updates the WaRP7 build descriptions for booting WaRP7 in
Trusted Board Boot mode. TBB is the only mode we really intend to support
for this board so rather than maintain documentation for the old way of
doing it, this patch updates the description for TBB mode only.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2019-01-18 16:10:56 +00:00
Harvey Hsieh b495791ba2 Tegra: support to set the L2 ECC and Parity enable bit
This patch adds capability to read the boot flag to enable L2 ECC
and Parity Protection bit for the Cortex-A57 CPUs. The previous
bootloader sets this flag value for the platform.

* with some coverity fix:
MISRA C-2012 Directive 4.6
MISRA C-2012 Rule 2.5
MISRA C-2012 Rule 10.3
MISRA C-2012 Rule 10.4

Change-Id: Id7303bbbdc290b52919356c31625847b8904b073
Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-16 10:10:52 -08:00
Paul Beesley 8aabea3358 Correct typographical errors
Corrects typos in core code, documentation files, drivers, Arm
platforms and services.

None of the corrections affect code; changes are limited to comments
and other documentation.

Change-Id: I5c1027b06ef149864f315ccc0ea473e2a16bfd1d
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-01-15 15:16:02 +00:00
Antonio Nino Diaz 09d40e0e08 Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-04 10:43:17 +00:00
Ding Tao 44eb04d23e docs: marvell: Fix typo in file build.txt
Replace "SECURE=0" with "MARVELL_SECURE_BOOT=0".

Signed-off-by: Ding Tao <miyatsu@qq.com>
2018-12-25 14:42:08 +08:00
Antonio Niño Díaz ea9c332d12
Merge pull request #1723 from soby-mathew/sm/reset_bl31_fix
FVP: Fixes for RESET_TO_BL31
2018-12-18 10:04:57 +01:00
Soby Mathew 8aa4e5f4eb docs: User-guide corrections for RESET_TO_BL31
This patch updates the user guide instructions for
RESET_TO_SP_MIN and RESET_TO_BL31 cases. The load
address for BL31 had to be updated because of increase
in code size. Also, information about PIE support when
RESET_TO_BL31=1 for FVP is added.

In the case of RESET_TO_SP_MIN, the RVBAR address
was wrong in the instruction. This is also corrected
in the patch.

Change-Id: I65fe6d28c5cf79bee0a11fbde320d49fcc1aacf5
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2018-12-17 15:25:49 +00:00
Antonio Niño Díaz 4dd62543b7
Merge pull request #1716 from miyatsu/marvell-doc-fix-20181210
docs: marvell: Fix typo in file build.txt
2018-12-17 11:54:16 +01:00
Soby Mathew 85456a9201
Merge pull request #1700 from jwerner-chromium/JW_crashfix
MULTI_CONSOLE_API fixes and cleanups
2018-12-10 14:00:01 +00:00
Ding Tao 5c31518cee docs: marvell: Fix typo in file build.txt
Replace "Uboot" with "Ubuntu".

Signed-off-by: Ding Tao <miyatsu@qq.com>
2018-12-10 09:31:23 +00:00
Julius Werner 63c52d0071 plat/common/crash_console_helpers.S: Fix MULTI_CONSOLE_API support
Crash reporting via the default consoles registered by MULTI_CONSOLE_API
has been broken since commit d35cc34 (Console: Use callee-saved
registers), which was introduced to allow console drivers written in C.
It's not really possible with the current crash reporting framework to
support console drivers in C, however we should make sure that the
existing assembly drivers that do support crash reporting continue to
work through the MULTI_CONSOLE_API.

This patch fixes the problem by creating custom console_putc() and
console_flush() implementations for the crash reporting case that do not
use the stack. Platforms that want to use this feature will have to link
plat/common/aarch64/crash_console_helpers.S explicitly.

Also update the documentation to better reflect the new reality (of this
being an option rather than the expected default for most platforms).

Change-Id: Id0c761e5e2fddaf25c277bc7b8ab603946ca73cb
Signed-off-by: Julius Werner <jwerner@chromium.org>
2018-12-06 16:10:32 -08:00
Antonio Niño Díaz 36bc633eec
Merge pull request #1653 from JackyBai/master
Add NXP i.MX8MQ basic support
2018-12-05 11:22:55 +01:00