Commit Graph

184 Commits

Author SHA1 Message Date
Masahisa Kojima b67d20297f plat/synquacer: enable SCMI support
Enable the SCMI protocol support in SynQuacer platform.
Aside from power domain, system power and apcore management protocol,
this commit adds the vendor specific protocol(0x80).
This vendor specific protocol is used to get the dram mapping information
from SCP.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2019-03-13 09:54:15 +09:00
Antonio Nino Diaz 73308618fe Minor changes to documentation and comments
Fix some typos and clarify some sentences.

Change-Id: Id276d1ced9a991b4eddc5c47ad9a825e6b29ef74
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-28 13:35:21 +00:00
Usama Arif a5aa25af65 Division functionality for cores that dont have divide hardware.
Cortex a5 doesnt support hardware division such as sdiv and udiv commands.
This commit adds a software division function in assembly as well as include
appropriate files for software divison.

The software division algorithm is a modified version obtained from:
http://www.keil.com/support/man/docs/armasm/armasm_dom1359731155623.htm

Change-Id: Ib405a330da5f1cea1e68e07e7b520edeef9e2652
Signed-off-by: Usama Arif <usama.arif@arm.com>
2019-02-19 17:07:48 +00:00
Soby Mathew 5dc2c3f95c GICv3: Allow probe for fewer GICR interfaces than exposed by the frame
Previously the GICv3 redistributor probe function
(gicv3_rdistif_base_addrs_probe()) asserted that the number of
per-CPU redistributor interfaces expected to be probed by the
platform is equal to the number exported by the redistributor
frame. This is a problem in case the number of CPUs in the
platform is less than the number of redistributor interfaces
in the frame. Hence this patch removes the assertion check
and allows probe for fewer redistributor interfaces as required
by the platform.

Change-Id: I3449763a3ad70817224442cbe184d001030c9874
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2019-02-04 15:42:36 +00:00
Antonio Nino Diaz 560293bb6f fvp: pwrc: Move to drivers/ folder
Change-Id: I670ea80e0331c2d4b2ccfa563a45469a43f6902d
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:11 +00:00
Antonio Nino Diaz 5932d194d7 plat/arm: sds: Move to drivers/ folder
Change-Id: Ia601d5ad65ab199e747fb60af4979b7db477d249
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:11 +00:00
Antonio Nino Diaz 2d4135e08f plat/arm: scp: Move to drivers/ folder
Change-Id: Ida5dae39478654405d0ee31a6cbddb4579e76a7f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:11 +00:00
Antonio Nino Diaz 0387aa42ac plat/arm: scpi: Move to drivers/ folder
Change-Id: Icc59cdaf2b56f6936e9847f1894594c671db2e94
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:11 +00:00
Antonio Nino Diaz c411396e55 plat/arm: mhu: Move to drivers/ folder
Change-Id: I656753a1825ea7340a3708b950fa6b57455e9056
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:11 +00:00
Antonio Nino Diaz 14928b88ab plat/arm: scmi: Move to drivers/ folder
Change-Id: I8989d2aa0258bf3b50a856c5b81532d578600124
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:11 +00:00
Paul Beesley 8aabea3358 Correct typographical errors
Corrects typos in core code, documentation files, drivers, Arm
platforms and services.

None of the corrections affect code; changes are limited to comments
and other documentation.

Change-Id: I5c1027b06ef149864f315ccc0ea473e2a16bfd1d
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-01-15 15:16:02 +00:00
Antonio Nino Diaz 09d40e0e08 Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-04 10:43:17 +00:00
Soby Mathew fd809dc8d8
Merge pull request #1715 from pangupta/master
ccn: for RN-I, used node id instead of node postion
2018-12-12 15:54:09 +00:00
Pankaj Gupta 2f2b9ec822 ccn: for RN-I, used node id instead of node postion
For RN-I, node id is used instead of node postion in the bitmap
to calculate the region id.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
2018-12-12 09:18:27 +05:30
Soby Mathew 85456a9201
Merge pull request #1700 from jwerner-chromium/JW_crashfix
MULTI_CONSOLE_API fixes and cleanups
2018-12-10 14:00:01 +00:00
Julius Werner 985ee0b7e8 drivers/console: Link console framework code by default
This patch makes the build system link the console framework code by
default, like it already does with other common libraries (e.g. cache
helpers). This should not make a difference in practice since TF is
linked with --gc-sections, so the linker will garbage collect all
functions and data that are not referenced by any other code. Thus, if a
platform doesn't want to include console code for size reasons and
doesn't make any references to console functions, the code will not be
included in the final binary.

To avoid compatibility issues with older platform ports, only make this
change for the MULTI_CONSOLE_API.

Change-Id: I153a9dbe680d57aadb860d1c829759ba701130d3
Signed-off-by: Julius Werner <jwerner@chromium.org>
2018-12-06 16:13:50 -08:00
Antonio Nino Diaz df54406df5 tzc380: Fix some asserts
This driver can be compiled in release builds, but GCC generates warnings
for some comparisons and that prevents the firmware from being built in
debug builds.

Change-Id: Ic52e1b4a11896ecf086864fbe2b5bfc143ec9b1b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-05 11:21:42 +00:00
Peng Fan 46f9b2c3a2 drivers: add tzc380 support
Add tzc380 support.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-12-04 18:06:41 +08:00
Antonio Niño Díaz 051cf88962
Merge pull request #1679 from pangupta/master
ccn: Introduce API to set and read value of node register
2018-11-29 16:05:05 +01:00
Pankaj Gupta 6f7dba4b24 ccn: Introduce API to set and read value of node register
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
2018-11-23 16:38:43 +05:30
Vijayenthiran Subramaniam 9d3b191a48 drivers/tzc-dmc620: add driver to setup DMC-620 TZC controller
ARM CoreLink DMC-620 Dynamic Memory Controller includes a TZC controller
to setup secure or non-secure regions of DRAM memory. The TZC controller
allows to setup upto eight such regions of memory in DRAM. This driver
provides helper functions to setup the TZC controller within DMC-620.

Change-Id: Iee7692417c2080052bdb7b1c2873a024bc5d1d10
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2018-11-21 19:25:35 +05:30
Antonio Nino Diaz c3cf06f1a3 Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.

The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.

The exceptions are files that are imported from other projects:

- CryptoCell driver
- dt-bindings folders
- zlib headers

Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-08 10:20:19 +00:00
Sandrine Bailleux b56ec68080 Remove _tzc_get_max_top_addr() function
This function was needed at the time where we didn't have the
compiler_rt lib. An AArch32-specific variant was provided to handle
the 64-bit shift operation in 32-bit. This is no longer needed.

Change-Id: Ibab709a95e3a723ae2eeaddf873dba70ff2012b3
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-11-06 17:28:20 +01:00
Antonio Niño Díaz 583cb003b3
Merge pull request #1640 from soby-mathew/sm/fin_con_reg
Multi-console: Deprecate the `finish_console_register` macro
2018-10-25 11:54:22 +02:00
Antonio Nino Diaz af6491f85c tzc: Fix MISRA defects
The definitions FAIL_CONTROL_*_SHIFT were incorrect, they have been
fixed.

The types tzc_region_attributes_t and tzc_action_t have been removed and
replaced by unsigned int because it is not allowed to do logical
operations on enums.

Also, fix some address definitions in arm_def.h.

Change-Id: Id37941d76883f9fe5045a5f0a4224c133c504d8b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-10-23 12:12:03 +01:00
Soby Mathew cc5859ca19 Multi-console: Deprecate the `finish_console_register` macro
The `finish_console_register` macro is used by the multi console
framework to register the `console_t` driver callbacks. It relied
on weak references to the `ldr` instruction to populate 0 to the
callback in case the driver has not defined the appropriate
function. Use of `ldr` instruction to load absolute address to a
reference makes the binary position dependant. These instructions
should be replaced with adrp/adr instruction for position independant
executable(PIE). But adrp/adr instructions don't work well with weak
references as described in GNU ld bugzilla issue 22589.

This patch defines a new version of `finish_console_register` macro
which can spcify which driver callbacks are valid and deprecates the
old one. If any of the argument is not specified, then the macro
populates 0 for that callback. Hence the functionality of the previous
deprecated macro is preserved. The USE_FINISH_CONSOLE_REG_2 define
is used to select the new variant of the macro and will be removed
once the deprecated variant is removed.

All the upstream console drivers have been migrated to use the new
macro in this patch.

NOTE: Platforms be aware that the new variant of the
`finish_console_register` should be used and the old variant is
deprecated.

Change-Id: Ia6a67aaf2aa3ba93932992d683587bbd0ad25259
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2018-10-19 17:34:52 +01:00
Antonio Nino Diaz 65199dc844 pl011: cnds: cbmem: 16550: Fix comments
The comments with the prototypes of the register functions of the
console drivers are incorrect. The arguments are wrong. This patch fixes
them.

Change-Id: I38c4b481ee69e840780111c42f03c0752eb6315c
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-10-12 14:47:41 +01:00
Dimitris Papastamos 200006df54
Merge pull request #1583 from danielboulby-arm/db/AArch32_Multi_Console
Enable Multi Console API in AArch32
2018-10-04 16:43:39 +01:00
Daniel Boulby c9263e62a7 Mark GICV3, CCI and CCN boot time code as init
Mark the GICv3, CCI and CCN code only used in Bl31 initialization
with __init to be reclaimed once no longer needed.

Change-Id: I3d77f36758450d9d1d87ecc60bc1c63fe4082667
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
2018-10-03 11:48:15 +01:00
Antonio Nino Diaz 28bcc45ec0 console: Remove deprecated files
Change-Id: Ib9eebbdff6f7868e1d1b8c41761cacc7501a25bd
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-09-28 15:31:53 +01:00
Antonio Nino Diaz 1a3764edaa cci400: Remove deprecated driver
This driver is deprecated.

Change-Id: Ic6e154a5756e779743b17a329eed4570ccc61389
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-09-28 15:31:53 +01:00
Antonio Nino Diaz b06b678ffb tzc400: Remove deprecated interfaces
Change-Id: I9874883ec33dbf293f607f9779d7c56f23cb8023
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-09-28 15:31:53 +01:00
Antonio Nino Diaz f9ed3cb624 gic: Remove deprecated driver and interfaces
Change-Id: I567a406edb090ae9d109382f6874846a79dd7473
Co-authored-by: Roberto Vargas <roberto.vargas@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-09-28 15:31:53 +01:00
Daniel Boulby 7e2bbef9f9 pl011: Add support in AArch32 for MULTI_CONSOLE_API
Allow AArch32 to use the multi console driver by adding the
required functions

Change-Id: I9e69f18965f320074cf75442d6b0de891aef7936
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
2018-09-21 13:04:07 +01:00
Soby Mathew ebf417aa83
Merge pull request #1540 from MISL-EBU-System-SW/marvell-updates-18.09
Marvell updates 18.09
2018-09-04 03:35:54 +01:00
Marcin Wojtas 4acd900df6 gicv2: enable configuring IRQ trigger type
This patch introduces new helper routines that allow
configuring the individual IRQs to be edge/level-triggered
via GICD_ICFGR registers. This is helpful to modify
the default configuration of the non-secure GIC SPI's, which
are all set during initialization to be level-sensitive.

Change-Id: I23deb4a0381691a686a3cda52405aa1dfd5e56f2
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-09-03 15:46:14 +03:00
Andrew F. Davis 2ac5002046 GIC: Fix build error
Pointers should be comparied to NULL.

Fixes: 3fea9c8b8e ("gic: Fix types")
Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-08-30 14:35:25 -05:00
Dimitris Papastamos dcf95e7e90
Merge pull request #1542 from antonio-nino-diaz-arm/an/bl31-misra
Some MISRA fixes in BL31, cci and smmu
2018-08-30 16:18:49 +01:00
Antonio Nino Diaz 4213e9bacd drivers: cci: Fix MISRA defects
Change-Id: Ifdb0ceec19d267b14d796b5d31f08f7342190484
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-08-30 09:22:34 +01:00
Antonio Nino Diaz 6d5f0631a6 drivers: smmu: Fix MISRA defects
Change-Id: I2954a99d5b72069bcb7bac9d6926c6209d6ba881
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-08-30 09:22:34 +01:00
Antonio Nino Diaz 0117d2cae9 gic v3: Fix width of types of helper functions
Change-Id: I08447b44fffb6e54f9fab957eee369ccbda4247a
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-08-30 09:22:16 +01:00
Antonio Nino Diaz 3fea9c8b8e gic: Fix types
Change-Id: I6a2adef87c20f9279446a54b7e69618fba3d2a25
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-08-30 09:22:16 +01:00
Antonio Nino Diaz 8782922c25 gic: Fix definitions
Change-Id: I945029ca26ea2e63f0d92c5f33019b882f23bd72
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-08-30 09:22:15 +01:00
Antonio Nino Diaz b9f68dfbfe gic v3: Turn macros into static inline functions
Change-Id: Ib587f12f36810fc7d4f4b8f575195554299b8ed4
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-08-30 09:22:15 +01:00
Roberto Vargas fcb52dbf16 cci: Use dsb to wait before reading status register
The CCI500 TRM explicitily requires completion of the write
operation before the read operation, and it is not guaranteed
by dmb but it is dsb.

Change-Id: Ieeaa0d1a4b8fcb87108dea9b6de03d9c8a150829
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-08-13 14:20:30 +01:00
Dimitris Papastamos 781842ea8a
Merge pull request #1501 from robertovargas-arm/cci
cci: Wait before reading status register
2018-08-06 16:09:20 +01:00
Dimitris Papastamos 72bc63185c
Merge pull request #1498 from glneo/cache-early-fixes
Early cache enable and coherency fixes
2018-07-30 16:53:34 +01:00
Antonio Nino Diaz 354305c3cf Fix MISRA defects in SP805 driver
Fix violations of MISRA C-2012 Rules 10.1, 10.3 and 10.4.

Change-Id: I13c6acda798c1666892f630f097a23e68748f9e4
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-30 09:30:15 +01:00
Andrew F. Davis 9262eb54db GIC: Do not flush cache when unneeded
When a platform enables its caches before it initializes the
GICC/GICR interface then explicit cache maintenance is not
needed. Remove these here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-07-26 14:14:07 -05:00
Roberto Vargas ae551a1370 cci: Wait before reading status register
The functions cci_enable_snoop_dvm_reqs and cci_disable_snoop_dvm_reqs write
in the SNOOP_CTRL_REGISTER of the slave interface and it polls the status
register to be sure that the operation is finished before leaving the
functions. If the write in SNOOP_CTRL_REGISTER is reordered after the first
read in the status register then these functions can finish before
enabling/disabling snoops and DVM messages.

The CCI500 TRM specifies:

	Wait for the completion of the write to the Snoop Control Register
	before testing the change_pending bit.

Change-Id: Idc7685963f412be1c16bcd3c6e3cca826e2fdf38
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-19 12:51:52 +01:00