Commit Graph

10657 Commits

Author SHA1 Message Date
Samuel Holland e2b18771fc feat(allwinner): provide CPU idle states to the rich OS
When using SCPI as the PSCI backend, firmware can wake up the CPUs and
cluster from sleep, so CPU idle states are available for the rich OS to
use. In that case, advertise them to the rich OS via the DTB.

Change-Id: I718ef6ef41212fe5213b11b4799613adbbe6e0eb
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 17:52:43 +02:00
Samuel Holland 52466ec38e feat(allwinner): simplify CPU_SUSPEND power state encoding
Use the encoding recommended by the PSCI specification: four bits for
the power state at each power level.

SCPI provides no way to handshake an exit from a standby state, so the
only possible standby state is the architectural WFI state. Since WFI
can be used outside of PSCI, we do not allow passing in standby states.

Change-Id: I4b3b84e5c255ee58a25255a0cab5d7623425086e
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 17:52:37 +02:00
Samuel Holland 159c36fd2f feat(allwinner): choose PSCI states to avoid translation
Aligning the PSCI and SCPI power states avoids some code to translate
between the two. This also makes room for an intermediate power state,
for future firmware capability growth.

Change-Id: I26691085f277a96bd405e3305ab0fe390a92b418
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 17:52:31 +02:00
Samuel Holland 2b2b565717 feat(fdt): add the ability to supply idle state information
Some platforms require extra firmware to implement CPU_SUSPEND, or only
have working CPU_SUSPEND in certain configurations. On these platforms,
CPU idle states should only be listed in the devicetree when they are
actually available. Add a function BL31 can use to dynamically supply
this idle state information.

Change-Id: I64fcc288303faba8abec4f59efd13a04220d54dc
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 17:52:25 +02:00
Samuel Holland 79808f10c3 fix(allwinner): improve DTB patching error handling
Currently, if any step of the DTB patching process fails, the whole
process is aborted. However, this causes some problems:
 - If any step modifies the DTB (including fdt_open_into), the dcache
   must still be cleaned, even if some later step fails.
 - The DTB may need changes in multiple places; if one patch fails (for
   example due to missing nodes), we should still apply other patches.
 - Similarly, if some patch fails, we should still run fdt_pack to
   clean up after ourselves.

Change-Id: If1af2e58e5a7edaf542354bb8a261dd1c3da1ad0
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 17:52:20 +02:00
Samuel Holland 3ccccc6580 refactor(allwinner): patch the DTB after setting up PSCI
Idle states are advertised to the rich OS by declaring them in the DTB.
Since the availability of idle states depends on which PSCI
implementation was chosen, the DTB must be updated after PSCI setup.

Move this operation to bl31_plat_runtime_setup, the platform hook
which happens at the right time. Defining this hook overrides the weak
definition from plat/common, so copy over the code from there, too.

Change-Id: I42a83edb9cb28e1803d17dc2d73dbc879d885222
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 17:52:11 +02:00
Andre Przywara 6fa8e72e7b refactor(allwinner): move DTB change code into allwinner/common
So far the H616 was the only Allwinner SoC needed to amend the DTB, to
reserve the DRAM portion that BL31 occupies.
To allow other SoCs to modify the DTB as well, without duplicating code,
move the DTB change routines into Allwinner common code, and generalise
the current code to allow other modifications.

No functional change intended.

Change-Id: I080ea07b6470367f3c2573a4368f8ef5196d411c
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-04-26 15:43:46 +02:00
Manish V Badarkhe a0d3df66f3 docs(fvp): specify correct reference of the hw_config address
TB_FW_CONFIG DT no longer contains the address of HW_CONFIG; it has
been moved to the FW_CONFIG DT since the introduction of FCONF.
Hence updated the documentation accordingly.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I37b68502a89dbd521acd99f2cb3aeb0bd36a04e0
2022-04-26 12:02:43 +01:00
Joanna Farley e61c00fa4b Merge "docs(intel): add Sieu Mun and Benjamin Jit Loon as maintainers" into integration 2022-04-26 12:18:18 +02:00
Sandrine Bailleux ab1c943981 Merge changes from topic "sb/mbedtls-2.28" into integration
* changes:
  docs(prerequisites): upgrade to mbed TLS 2.28.0
  build(deps): upgrade to mbed TLS 2.28.0
2022-04-26 07:49:06 +02:00
anans a475518337 fix(ufs): read and write attribute based on spec
according to the spec, the response to read attr comes in the
ts.attr.value field and not in the data segment.

Signed-off-by: anans <anans@google.com>
Change-Id: Iaf21883bb7e364fd7c7e4bccb33359367a0cf99d
2022-04-26 06:13:06 +02:00
anans b3f03b2013 fix(ufs): disables controller if enabled
ufs controller needs to be disabled if already enabled, without
this we noticed a crash at linkstartup during reinit

Signed-off-by: anans <anans@google.com>
Change-Id: I523c5d57c1d34f6404a6368ee3f364fbffd2e542
2022-04-26 06:12:37 +02:00
Madhukar Pappireddy b08a199b40 Merge "fix(xilinx): fix mismatching function prototype" into integration 2022-04-26 04:45:16 +02:00
Lauren Wehrmeister 394f2ea034 Merge changes Iccfa7ec6,Ide9a7af4 into integration
* changes:
  feat(intel): add macro to switch between different UART PORT
  feat(intel): add SMC support for ROM Patch SHA384 mailbox
2022-04-25 23:02:07 +02:00
Lauren Wehrmeister cb1247e46a Merge "fix(bakery_lock): add __unused for clang" into integration 2022-04-25 22:08:31 +02:00
Madhukar Pappireddy 91665f49c3 Merge "fix(ufs): fix cache maintenance issues" into integration 2022-04-25 20:59:58 +02:00
Madhukar Pappireddy 5b44657a97 Merge changes from topic "st_fwu_bkp_reg" into integration
* changes:
  feat(stm32mp1): retry 3 times FWU trial boot
  refactor(stm32mp1): update backup reg for FWU
2022-04-25 19:28:33 +02:00
Sandrine Bailleux 5cae337337 docs(prerequisites): upgrade to mbed TLS 2.28.0
Upgrade to the latest and greatest 2.x release of Mbed TLS library
(i.e. v2.28.0) to take advantage of their bug fixes.

Note that the Mbed TLS project published version 3.x some time
ago. However, as this is a major release with API breakages, upgrading
to 3.x might require some more involved changes in TF-A, which we are
not ready to do. We shall upgrade to mbed TLS 3.x after the v2.7
release of TF-A.

Change-Id: I887dfd87893169c7be53b986e6c43338d15949d7
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-04-25 10:26:10 +02:00
Sandrine Bailleux a93084be95 build(deps): upgrade to mbed TLS 2.28.0
Upgrade to the latest and greatest 2.x release of Mbed TLS library
(i.e. v2.28.0) to take advantage of their bug fixes.

Note that the Mbed TLS project published version 3.x some time
ago. However, as this is a major release with API breakages, upgrading
to 3.x might require some more involved changes in TF-A, which we are
not ready to do. We shall upgrade to mbed TLS 3.x after the v2.7
release of TF-A.

Actually, the upgrade this time simply boils down to including the new
source code module 'constant_time.c' into the firmware.

To quote mbed TLS v2.28.0 release notes [1]:

  The mbedcrypto library includes a new source code module
  constant_time.c, containing various functions meant to resist timing
  side channel attacks. This module does not have a separate
  configuration option, and functions from this module will be
  included in the build as required.

As a matter of fact, if one is attempting to link TF-A against mbed
TLS v2.28.0 without the present patch, one gets some linker errors
due to missing symbols from this new module.

Apart from this, none of the items listed in mbed TLS release
notes [1] directly affect TF-A. Special note on the following one:

  Fix a bug in mbedtls_gcm_starts() when the bit length of the iv
  exceeds 2^32.

In TF-A, we do use mbedtls_gcm_starts() when the firmware decryption
feature is enabled with AES-GCM as the authenticated decryption
algorithm (DECRYPTION_SUPPORT=aes_gcm). However, the iv_len variable
which gets passed to mbedtls_gcm_starts() is an unsigned int, i.e. a
32-bit value which by definition is always less than 2**32. Therefore,
we are immune to this bug.

With this upgrade, the size of BL1 and BL2 binaries does not appear to
change on a standard sample test build (with trusted boot and measured
boot enabled).

[1] https://github.com/Mbed-TLS/mbedtls/releases/tag/v2.28.0

Change-Id: Icd5dbf527395e9e22c8fd6b77427188bd7237fd6
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-04-25 10:23:52 +02:00
Sandrine Bailleux bc7b709863 Merge "docs(prerequisites): update Arm compilers download link" into integration 2022-04-25 10:05:08 +02:00
Sandrine Bailleux 71a5543bcf docs(prerequisites): update Arm compilers download link
Right now, TF-A documentation recommends downloading Arm compilers
from:

  https://developer.arm.com/open-source/gnu-toolchain/gnu-a/downloads

However, this page is now deprecated, as indicated by the banner at
the top of the page. When navigating to the new recommended page, one
can see the following note, which provides the rationale for the
deprecation:

  GNU Toolchain releases from Arm were published previously as two
  separate releases - one for A-profile and the other for R & M
  profiles (GNU Toolchain for A-profile processors and GNU Arm
  Embedded Toolchain).

  Arm GNU Toolchain releases unifies these two into a single release
  and the previous way of releases therefore have been
  discontinued. However, the previous releases will continue to be
  available for reference.

This patch updates the link to the new recommended place for compiler
downloads.

Change-Id: Iefdea3866a1af806a5db2d2288edbb63c543b8ee
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2022-04-25 08:19:44 +02:00
Sandrine Bailleux 94909893df Merge "docs: fix mailing lists URLs" into integration 2022-04-25 07:58:46 +02:00
anans 50593e696e refactor(ufs): adds a function for fdeviceinit
time taken for device init varies based on different devices,
instead of waiting for 200ms - we can poll on fdevice init
until it gets cleared, similar to what linux does

Change-Id: I571649231732fde0cd6d5be89b6f14fe905fcaff
Signed-off-by: anans <anans@google.com>
2022-04-25 05:47:35 +02:00
Sieu Mun Tang 5ca81820de docs(intel): add Sieu Mun and Benjamin Jit Loon as maintainers
Add Sieu Mun Tang and Benjamin Jit Loon Lim as new
Intel SocFPGA platform maintainers and remove the
rest of the Intel SocFPGA platform maintainers.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ieb9a35e278d70a12351aaccab90ddc7be09dc861
2022-04-23 09:50:35 +08:00
Olivier Deprez 65b13bace4 Merge changes from topic "ffa_el3_spmc" into integration
* changes:
  feat(spmc): add support for direct req/resp
  feat(spmc): add support for handling FFA_ERROR ABI
  feat(spmc): add support for FFA_MSG_WAIT
  feat(spmc): add function to determine the return path from the SPMC
  feat(spmd): enable handling of FF-A SMCs with the SPMC at EL3
  feat(spmd): update SPMC init flow to use EL3 implementation
  feat(spmc): add FF-A secure partition manager core
  feat(spmc): prevent read only xlat tables with the EL3 SPMC
  feat(spmc): enable building of the SPMC at EL3
  refactor(spm_mm): reorganize secure partition manager code
2022-04-22 21:09:13 +02:00
Manish Pandey 115748b209 Merge "fix(stm32mp1): correct dtc version check" into integration 2022-04-22 17:22:59 +02:00
Yann Gautier 429f10e336 fix(stm32mp1): correct dtc version check
Depending on the shell used, the grep command can fail, leading to
a wrong dtc version detection. Correct that by adding quotes.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I329ec929559c94bf1bf99b127662c9d978e067cf
2022-04-22 13:23:22 +02:00
Olivier Deprez 6f8674964b Merge "feat(spm): add FFA_RX_ACQUIRE forwarding in SPMD" into integration 2022-04-21 11:35:42 +02:00
Sandrine Bailleux f4a55e6b32 docs: fix mailing lists URLs
With the transition to mailman3, the URLs of TF-A and TF-A Tests
mailing lists have changed. However, we still refer to the old
location, which are now dead links.

Update all relevant links throughout the documentation.

There is one link referring to a specific thread on the TF-A mailing
list in the SPM documentation, for which I had to make a guess as to
what's the equivalent mailman3 URL. The old URL scheme indicates that
the thread dates from February 2020 but beyond that, I could not make
sense of the thread id within the old URL so I picked the most likely
match amongst the 3 emails posted on the subject in this time period.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Reported-by: Kuohong Wang <kuohong.wang@mediatek.com>
Change-Id: I83f4843afd1dd46f885df225931d8458152dbb58
2022-04-21 10:26:23 +02:00
Marc Bonnici 9741327df5 feat(spmc): add support for direct req/resp
Enable the SPMC to handle FFA_MSG_SEND_DIRECT_REQ and
FFA_MSG_SEND_DIRECT_RESP ABIs.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ia196c7405993f600e4fdbf467397ea3fb035a62a
2022-04-20 19:40:31 +01:00
Marc Bonnici d663fe7a30 feat(spmc): add support for handling FFA_ERROR ABI
This ABI is only valid during SP initialisation to indicate
failure. If this occurs during SP initialisation signal a failure,
otherwise respond with a not supported error code.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I0182a1641c0f6850e82173af333be79b594f2318
2022-04-20 19:40:31 +01:00
Marc Bonnici c4db76f066 feat(spmc): add support for FFA_MSG_WAIT
Handle an incoming call of FFA_MSG_WAIT from the secure world
and update the runtime state of the calling partition accordingly.

This ABI can be called in the following scenarios:
  - Used by an SP to signal it has finished initializing.
  - To resume the normal world after handling a secure interrupt
    that interrupted the normal world.
  - To relinquish control back to the normal world.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I929713a2280e8ec291b5b4e8f6d4b49df337228c
2022-04-20 19:40:31 +01:00
Marc Bonnici 20fae0a7ce feat(spmc): add function to determine the return path from the SPMC
Use knowledge of the target partition ID and source security state
to determine which route should be used to exit the SPMC.

There are 3 exit paths:
1) Return to the normal world via the SPMD, this will take care of
   switching contexts if required.
2) Return to the secure world when the call originated in the normal
   world and therefore switch contexts.
3) Return to the secure world when the call originated in the secure
   world, therefore we can return directly.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I4037f3a8a8519e2c9f1876be92806d2c41d0d154
2022-04-20 19:40:31 +01:00
Marc Bonnici bb01a67306 feat(spmd): enable handling of FF-A SMCs with the SPMC at EL3
Any FF-A SMC that arrives from the normal world is handled by the
SPMD before being forwarded to the SPMC. Similarly any SMC
arriving from the secure world will hit the SPMC first and be
forwarded to the SPMD if required, otherwise the SPMC will
respond directly.

This allows for the existing flow of handling FF-A ABI's when
the SPMC resides at a lower EL to be preserved.

In order to facilitate this flow the spmd_smc_forward function
has been split and control is either passed to the SPMC or it is
forwarded as before. To allow this the flags and cookie parameters
must now also be passed into this method as the SPMC must be able to
provide these when calling back into the SPMD handler as appropriate.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I84fee8390023295b9689067e14cd25cba23ca39b
2022-04-20 19:40:28 +01:00
Marc Bonnici 6da76075bf feat(spmd): update SPMC init flow to use EL3 implementation
Allow the SPMD to initialise an SPMC implementation at EL3 directly
rather than at a lower EL.
This includes removing the requirement to parse an SPMC manifest to
obtain information about the SPMC implementation, in this case since the
SPMD and SPMC reside in the same EL we can hardcode the required
information directly.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I66d1e1b3ec2d0abbfc28b011a32445ee890a331d
2022-04-20 18:29:32 +01:00
Marc Bonnici 5096aeb2ba feat(spmc): add FF-A secure partition manager core
This patch introduces the core support for enabling an SPMC in EL3
as per the FF-A spec.

The current implemented functionality is targeted to enable
initialization of the SPMC itself and initial support for
bringing up a single S-EL1 SP.

This includes initialization of the SPMC's internal state,
parsing of an SP's manifest, preparing the cpu contexts and
appropriate system registers for the Secure Partition.

The spmc_smc_handler is the main handler for all incoming SMCs
to the SPMC, FF-A ABI handlers and functionality will
be implemented in subsequent patches.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ib33c240b91e54cbd018a69fec880d02adfbe12b9
2022-04-20 18:29:30 +01:00
Joanna Farley e96ffdc8b4 Merge "fix(errata): workaround for Cortex-X2 erratum 2147715" into integration 2022-04-19 17:07:49 +02:00
Manish Pandey dfc59a7b82 Merge changes from topic "st_nvmem_layout" into integration
* changes:
  refactor(stm32mp1-fdts): remove nvmem_layout node
  refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
  refactor(st): remove useless includes
2022-04-19 16:11:24 +02:00
Manish Pandey 38b7828e1a Merge "refactor(ufs): delete unused variables" into integration 2022-04-19 11:51:12 +02:00
Jayanth Dodderi Chidanand 781d07a421 refactor(twed): improve TWED enablement in EL-3
The current implementation uses plat_arm API under generic code.
"plat_arm" API is a convention used with Arm common platform layer
and is reserved for that purpose. In addition, the function has a
weak definition which is not encouraged in TF-A.

Henceforth, removing the weak API with a configurable macro "TWED_DELAY"
of numeric data type in generic code and simplifying the implementation.
By default "TWED_DELAY" is defined to zero, and the delay value need to
be explicitly set by the platforms during buildtime.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: I25cd6f628e863dc40415ced3a82d0662fdf2d75a
2022-04-17 23:48:10 +01:00
Jorge Troncoso a8904e94f0 refactor(ufs): delete unused variables
The result variable is not being used so it's better to delete it.

Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: Icae614076ce1ba7cdc86267473d59a8bec682f6c
2022-04-14 14:35:12 -07:00
Sayanta Pattanayak 70d986ddbb feat(spmc): prevent read only xlat tables with the EL3 SPMC
If using the EL3 SPMC ensure that we don't mark the translation
tables as read only. The SPMC requires the ability to map and
unmap a partitions RX/TX buffers at runtime.

Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ibb78a6a2e3847ce4ec74ce81a9bb61ce34fec24c
2022-04-13 09:44:52 +01:00
Marc Bonnici 1d63ae4d0d feat(spmc): enable building of the SPMC at EL3
Introduce build flag for enabling the secure partition
manager core, SPMC_AT_EL3. When enabled, the SPMC module
will be included into the BL31 image. By default the
flag is disabled.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I5ea1b953e5880a07ffc91c4dea876a375850cf2a
2022-04-13 09:44:49 +01:00
Joanna Farley 863296898a Merge "refactor(context mgmt): add cm_prepare_el3_exit_ns function" into integration 2022-04-12 17:44:52 +02:00
Joanna Farley 9c2e925964 Merge "refactor(mpam): remove initialization of EL2 registers when EL2 is used" into integration 2022-04-12 17:44:41 +02:00
Joanna Farley d2b68f498f Merge "refactor(context mgmt): refactor the cm_setup_context function" into integration 2022-04-12 17:44:31 +02:00
Joanna Farley 6cd0a2cbb3 Merge "refactor(context mgmt): remove registers accessible only from secure state from EL2 context" into integration 2022-04-12 17:44:00 +02:00
Zelalem Aweke 8b95e84870 refactor(context mgmt): add cm_prepare_el3_exit_ns function
As part of the RFC:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/13651,
this patch adds the 'cm_prepare_el3_exit_ns' function. The function is
a wrapper to 'cm_prepare_el3_exit' function for Non-secure state.

When EL2 sysregs context exists (CTX_INCLUDE_EL2_REGS is
enabled) EL1 and EL2 sysreg values are restored from the context
instead of directly updating the registers.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: I9b071030576bb05500d54090e2a03b3f125d1653
2022-04-12 17:42:11 +02:00
Zelalem Aweke fd5da7a847 refactor(mpam): remove initialization of EL2 registers when EL2 is used
The patch removes initialization of MPAM EL2 registers when an EL2
software exists. The patch assumes the EL2 software will perform
the necessary initializations of the registers.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: I5bed81bc22f417bc3e3cbbcd860a8553cd4307cd
2022-04-12 17:41:51 +02:00
Zelalem Aweke 2bbad1d126 refactor(context mgmt): refactor the cm_setup_context function
This patch splits the function 'cm_setup_context' into four
functions to make it more readable and easier to maintain.

The function is split into the following functions based on
the security state of the context.

 - setup_context_common - performs common initializations
 - setup_secure_context - performs Secure state specific
			  initializations
 - setup_realm_context - performs Realm state specific
			 initializations
 - setup_ns_context - performs Non-secure state specific
		      initializations

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: Ie14a1c2fc6586087e7aa36537cf9064c80802f8f
2022-04-12 17:41:41 +02:00